THOMAS T NGUYEN, M.D.
Osteopathic Medicine at Bascom Ave, San Jose, CA

6697553, Feb 24, 2004

Feb 15, 2002

10/077581

Jyoti Kiron Bhardwaj - Cupertino CA
Robert James Brainard - Sunnyvale CA
David J. Chapman - San Jose CA
Douglas E. Crafts - San Jose CA
David Dougherty - Sunnyvale CA
Erik W. Egan - Oakland CA
James F. Farrell - San Jose CA
Mark B. Farrelly - San Jose CA
Niranjan Gopinathan - Santa Clara CA
Kenzo Ishida - Saratoga CA
David K. Nakamoto - Sunnyvale CA
Thomas Thuan Nguyen - San Jose CA
Suresh Ramalingam - Fremont CA
Steven M. Swain - San Jose CA
Sanjay M. Thekdi - Santa Clara CA
Anantharaman Vaidyanathan - San Jose CA
Hiroaki Yamada - San Jose CA
Yingchao Yan - Milpitas CA

JDS Uniphase Corporation - San Jose CA

G02B 634

385 37, 385 24, 385 46, 385 43

A planar lightwave circuit includes an arrayed waveguide grating (AWG), with input and output waveguides, partially curved array waveguides with respective length differences, and planar waveguide regions for focusing optical energy between the input/output and array waveguides. Optimal waveguide widths and spacing along the planar waveguide region facets are disclosed, which are largely determinative of AWG size and optical performance. Also disclosed are optimal cross-sectional waveguide dimensions (e. g. , width and height); modified index of refraction difference between the waveguide core and cladding regions; and optimal array waveguide lengths, path length differences, and free spectral range. These features, especially when combined with advanced fiber attachment, passivation and packaging techniques, result in high-yield, high-performance AWGs (both gaussian and flattop versions).

7162108, Jan 9, 2007

Dec 17, 2004

11/015223

Anca L. Sala - Troy MI, US
Duncan W. Harwood - Santa Clara CA, US
Barthelemy Fondeur - Mountain View CA, US
Anantharaman Vaidyanathan - Cupertino CA, US
Robert J. Brainard - Sunnyvale CA, US
Sanjay M. Thekdi - Santa Clara CA, US
Thomas T. Nguyen - San Jose CA, US
Ian Hutagalung - San Jose CA, US

JDS Uniphase Corporation - Milpitas CA

G02F 1/01, G02F 1/035, G02F 1/00, G02B 26/00, G02B 6/26, G02B 6/42

385 2, 385 1, 385 3, 385 39, 385 40, 359237, 359238, 359240, 359288

The invention relates to a variable optical attenuator constructed as a Mach Zehnder planar lightwave circuit, particularly including a channel waveguide support structure for heat isolation and stress relief to reduce polarization dependent loss (PDL) and power consumption in the device. Power reduction trenches comprise longitudinal segments having small stress relief pillars of cladding material left in between them in the etching process. The waveguides of the MZI are supported by a main pillar structure and integral stress relief pillars which remain after removal of the trenches. The waveguide is surrounded by air on three sides for improved heat isolation. The performance of the present invention shows substantial improvement in PDL and extinction ratio over the prior art continuous trench design, and also, to a smaller degree, over the case where power reduction trenches are not used at all. Segmented trenches appear to allow for the lowest stress on the two waveguide arms of all the cases including no trench and trenched devices.

6947653, Sep 20, 2005

Oct 12, 2001

09/977065

Jyoti Kiron Bhardwaj - Cupertino CA, US
Robert James Brainard - Sunnyvale CA, US
David Dougherty - Sunnyvale CA, US
Erik W. Egan - Oakland CA, US
Niranjan Gopinathan - Santa Clara CA, US
David K. Nakamoto - Sunnyvale CA, US
Thomas Thuan Nguyen - San Jose CA, US
Sanjay M. Thekdi - Santa Clara CA, US
Anantharaman Vaidyanathan - San Jose CA, US
Hiroaki Yamada - San Jose CA, US
Yingchao Yan - Milpitas CA, US

JDS Uniphase Corporation - San Jose CA

G02B006/10, G02B006/13, G02F001/295

385129, 385 10, 385 11, 385132, 438 31

A planar lightwave circuit includes at least one optical waveguide core, and at least one feature proximate the core having a stress-engineered property to balance stress and therefore minimize birefringence affecting the core. A protective passivation layer is formed over the core and the feature to be substantially non-interfering with the balanced stress provided by the feature. The stress balancing feature may be an overcladding layer formed over the core, doped to have a coefficient of thermal expansion approximately matched to that of an underlying substrate, to symmetrically distribute stress in an undercladding between the overcladding and the substrate, away from the core. The protective passivation layer is formed to have a coefficient of thermal expansion approximately matched to that of the overcladding. In one exemplary embodiment, the passivation layer is formed from silicon nitride. Related concepts of stress release grooves, and core overetching, are also disclosed.