MATTHEW EDDIE BROWN
Pilots at Helen St, Seattle, WA

8023742, Sep 20, 2011

Oct 9, 2007

11/868988

Matthew Alun Brown - Seattle WA, US
Gang Hua - Kirkland WA, US
Simon A. J. Winder - Seattle WA, US

Microsoft Corporation - Redmond WA

G06K 9/46, G06K 9/68

382195, 382219

To render the comparison of image patches more efficient, the data of an image patch can be projected into a smaller-dimensioned subspace, resulting in a descriptor of the image patch. The projection into the descriptor subspace is known as a linear discriminant embedding, and can be performed with reference to a linear discriminant embedding matrix. The linear discriminant embedding matrix can be constructed from projection vectors that maximize those elements that are shared by matching image patches or that are used to distinguish non-matching image patches, while also minimizing those elements that are common to non-matching image patches or that distinguish matching image patches. The determination of such projection vectors can be limited such that only orthogonal vectors comprise the linear discriminant embedding matrix. The determination of the linear discriminant embedding matrix can likewise be constrained to avoid overfitting to training data.

2013012, May 16, 2013

Jun 4, 2012

13/488377

David R. Jefferson - San Ramon CA, US
Alexander Pertica - Livermore CA, US
Matthew C. Brown - Seattle WA, US
Willem H. De Vries - Livermore CA, US
Benjamin J. Fasenfest - Union City CA, US
Matthew A. Horsley - Danville CA, US
Ming Jiang - Dublin CA, US
James R. Leek - Livermore CA, US
JoAnne L. Levatin - Livermore CA, US
Segei Nikolaev - Sacramento CA, US
Scot S. Olivier - Livermore CA, US
Donald William Phillion - Dublin CA, US
Harry K. Springer - Pleasanton CA, US

G06G 7/48

703 6

An internally parallel PDES (“IP-PDES”) system performs logical processes in parallel and further performs the internal processing of at least one logical process in parallel. Because the IP-PDES system is PDES-based, each logical process may have its processing performed in parallel with the other logical processes. The IP-PDES system allows for certain logical processes to be designated as internally parallel meaning that the logical process, referred to as an IP logical process, has its internal processing also performed in parallel. The IP-DES system allocates multiple nodes for such an IP logical process so that executable code of the IP logical process executes in parallel at the allocated nodes to simulate the occurrence of an event. Internal parallelism within a PDES may help overcome resource limitations and help speed up the overall simulation.

7970226, Jun 28, 2011

Apr 23, 2007

11/738875

Simon Winder - Seattle WA, US
Matthew Brown - Seattle WA, US

Microsoft Corporation - Redmond WA

G06K 9/40

382254, 382103, 382141, 434262, 345418

A local image descriptor generation technique that produces a descriptor for an image patch is presented. The technique generally involves smoothing the pixels of the image patch, followed by employing a transformation to produce a transform vector for each of a set of sample points spaced across the image patch. The transform vectors are weighted and spatially accumulated to produce a prescribed number of linearly summed vectors. The linearly summed vectors are concatenated to form a raw local image descriptor, which is normalized to produce a finalized descriptor for the image patch.