JOHN EDWARD HESSE
Pilots in Moss Beach, CA
License number
California A0835784
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
PO Box 699, Moss Beach, CA 94038
Professional information
Multiple-Path Wormhole Interconnect
US Patent:
6754207, Jun 22, 2004
Filed:
Oct 19, 2000
Appl. No.:
09/693359
Inventors:
John Hesse - Moss Beach CA
Assignee:
Interactic Holdings, LLC - Princeton NJ
International Classification:
H04L 1228
US Classification:
370388, 370400
Abstract:
A family of interconnect structures, switches that exploit the interconnect structures to attain scalability, low latency, and single-chip implementations. The disclosed interconnect structures and switches support a wide variety of applications including supercomputer interconnects, LAN switches, IP and ATM switches, telephony central office switching, video on demand servers, interconnects for mainframe database servers, high-speed workstation interconnects, and many others that are known to those having ordinary skill in the art.
Scaleable Interconnect Structure Utilizing Quality-Of-Service Handling
US Patent:
7016363, Mar 21, 2006
Filed:
Oct 19, 2000
Appl. No.:
09/693358
Inventors:
Coke S. Reed - Princeton NJ, US
John E. Hesse - Moss Beach CA, US
John E. Hesse - Moss Beach CA, US
Assignee:
Interactic Holdings, LLC - Cranbury NJ
International Classification:
H04L 12/28
US Classification:
370404, 370406, 370410, 370408
Abstract:
An interconnect structure and method of communicating messages on the interconnect structure assists high priority messages to travel through the interconnect structure at a faster rate than normal or low priority messages. An interconnect structure includes a plurality of nodes with a plurality of interconnect lines selectively coupling the nodes in a hierarchical multiple-level structure. Data moves from an uppermost source level to a lowermost destination level. Nodes in the structure are arranged in columns and levels. Data wormholes through the structure and, in a given time-step, data always moves from one column to an adjacent column and while remaining on the same level or moving down to a lower level. When data moves down a level, an additional bit of the target output is fixed so data exiting from the bottom of the structure arrives at the proper target output port.
Scalable Apparatus And Method For Increasing Throughput In Multiple Level Minimum Logic Networks Using A Plurality Of Control Lines
US Patent:
7221677, May 22, 2007
Filed:
Oct 19, 2000
Appl. No.:
09/692073
Inventors:
Coke Reed - Princeton NJ, US
John Hesse - Moss Beach CA, US
John Hesse - Moss Beach CA, US
Assignee:
Interactic Holdings, LLC - Austin TX
International Classification:
H04L 12/28, H04L 12/50, G06F 15/173
US Classification:
370404, 370388, 370409, 709238
Abstract:
A network or interconnect structure which includes a plurality of nodes which are interconnected within a hierarchical multiple level structure. The level of each node is determined by the position of the node within the structure and data messages move from node to node from a source level to a destination level. Each node within the interconnect structure is capable of receiving simultaneous data messages at its input ports from any other node and the receiving node is able to transmit each of the received data messages through its output ports to separate nodes in the interconnect structure to one or more levels below the level of the receiving node.
Means And Apparatus For A Scaleable Congestion Free Switching System With Intelligent Control Iii
US Patent:
7835278, Nov 16, 2010
Filed:
Nov 17, 2008
Appl. No.:
12/272274
Inventors:
John Hesse - Moss Beach CA, US
Coke Reed - Austin TX, US
David Murphy - Austin TX, US
Coke Reed - Austin TX, US
David Murphy - Austin TX, US
Assignee:
Interactic Holdings, LLC - Austin TX
International Classification:
H04L 12/26, H04L 12/50, H04L 12/56
US Classification:
370230, 370369, 370392
Abstract:
A switching system for routing information packets that can simultaneously receive a variety of packet formats. The packet formats include electronic packet transmissions, optical wave division multiplexed data (WDM) with a single frame consisting of a plurality of packets to be sent to a common output line, with each packet traveling on a separate wavelength, WDM packets where the header of an individual packet travels on a wavelength different from the remainder of the packet (i. e. the payload) and the payload either travels on a single wavelength or is subdivided into a plurality of sub-packets with each sub-packet carried on a separate wavelength, and the like. The system includes input devices, a scheduling unit, a switching unit; and variable delay line units. A deconcentrator in the packet switching system creates a minimum gap between packets.
Means And Apparatus For A Scaleable Congestion Free Switching System With Intelligent Control Iii
US Patent:
2006017, Aug 3, 2006
Filed:
Aug 31, 2005
Appl. No.:
11/214984
Inventors:
John Hesse - Moss Beach CA, US
Coke Reed - Austin TX, US
David Murphy - Austin TX, US
Coke Reed - Austin TX, US
David Murphy - Austin TX, US
International Classification:
H04L 12/56, H04L 12/28
US Classification:
370389000, 370408000
Abstract:
A switching system for routing information packets that can simultaneously receive a variety of packet formats. The packet formats include electronic packet transmissions, optical wave division multiplexed data (WDM) with a single frame consisting of a plurality of packets to be sent to a common output line, with each packet traveling on a separate wavelength, WDM packets where the header of an individual packet travels on a wavelength different from the remainder of the packet (i.e. the payload) and the payload either travels on a single wavelength or is subdivided into a plurality of sub-packets with each sub-packet carried on a separate wavelength, and the like. The system includes input devices, a scheduling unit, a switching unit; and variable delay line units. A deconcentrator in the packet switching system creates a minimum gap between packets.
Means And Apparatus For A Scaleable Congestion Free Switching System With Intelligent Control
US Patent:
2003003, Feb 20, 2003
Filed:
Jul 31, 2001
Appl. No.:
09/919462
Inventors:
Coke Reed - Princeton NJ, US
John Hesse - Moss Beach CA, US
John Hesse - Moss Beach CA, US
International Classification:
H04J001/16
US Classification:
370/230000, 370/419000
Abstract:
This invention is directed to a parallel, control-information generation, distribution and processing system. This scalable, pipelined control and switching system efficiently and fairly manages a plurality of incoming data streams, and applies class and quality of service requirements. The present invention also uses scalable MLML switch fabrics to control a data packet switch, including a request-processing switch used to control the data-packet switch. Also included is a request processor for each output port, which manages and approves all data flow to that output port, and an answer switch which transmits answer packets from request processors back to requesting input ports.
Means And Apparatus For A Scalable Congestion Free Switching System With Intelligent Control
US Patent:
2008006, Mar 20, 2008
Filed:
Nov 29, 2007
Appl. No.:
11/947209
Inventors:
Coke Reed - Austin TX, US
John Hesse - Moss Beach CA, US
John Hesse - Moss Beach CA, US
Assignee:
INTERACTIC HOLDINGS, LLC - Austin TX
International Classification:
H04L 12/28
US Classification:
370410000
Abstract:
This invention is directed to a parallel, control-information generation, distribution and processing system. This scalable, pipelined control and switching system efficiently and fairly manages a plurality of incoming data streams, and applies class and quality of service requirements. The present invention also uses scalable MLML switch fabrics to control a data packet switch, including a request-processing switch used to control the data-packet switch. Also included is a request processor for each output port, which manages and approves all data flow to that output port, and an answer switch which transmits answer packets from request processors back to requesting input ports.
Scaleable Low-Latency Switch For Usage In An Interconnect Structure
US Patent:
6289021, Sep 11, 2001
Filed:
Jan 20, 1998
Appl. No.:
9/009703
Inventors:
John E. Hesse - Moss Beach CA
Assignee:
Interactic Holdings, LLC - Princeton NJ
International Classification:
H04L 1256
US Classification:
370409
Abstract:
A scalable low-latency switch extends the functionality of a multiple level minimum logic interconnect structure for usage in computers of all types, networks and communication systems. The multiple level minimum logic interconnect structure employs a data flow technique based on timing and positioning of messages moving through the structure. The scalable low-latency switch is distributed throughout multiple nodes in the structure so that a supervisory controller providing a global control function and complex logic structures are avoided while the interconnect structure operates as a "deflection" or "hot potato" system in which processing and storage overhead at each node is reduced. The interconnect structure using the scalable low-latency switch employs a method of achieving wormhole routing through an integrated circuit chip by a novel procedure for inserting messages into the chip. Rather than simultaneously inserting a message into each unblocked node on the outer cylinder at every angle, messages are inserted simultaneously into two columns A and B only if an entire message fits between A and B.
Multiple-Path Wormhole Interconnect
US Patent:
7382775, Jun 3, 2008
Filed:
May 18, 2004
Appl. No.:
10/847806
Inventors:
John E. Hesse - Moss Beach CA, US
Assignee:
Interactic Holdings, LLC - New York NY
International Classification:
H04Q 11/00, H04L 12/28, G06F 15/173
US Classification:
370386, 370400, 709238
Abstract:
A family of interconnect structures, switches that exploit the interconnect structures to attain scalability, low latency, and single-chip implementations. The disclosed interconnect structures and switches support a wide variety of applications including supercomputer interconnects, LAN switches, IP and ATM switches, telephony central office switching, video on demand servers, interconnects for mainframe database servers, high-speed workstation interconnects, and many others that are known to those having ordinary skill in the art.
Non-Reloadable Syringe
US Patent:
4731068, Mar 15, 1988
Filed:
May 1, 1987
Appl. No.:
7/045867
Inventors:
John E. Hesse - Moss Beach CA
International Classification:
A61M 500
US Classification:
604110
Abstract:
In general a non-reloadable syringe has been provided wherein the plunger unit thereof is permitted to be withdrawn for purposes of loading the syringe and permitted to be urged forwardly to discharge the contents of the syringe. However, means are provided whereby subsequent retraction of the plunger assembly is inhibited to prevent further loading and use of the syringe.