ERIC SCOTT LEE
Medical Practice in Allentown, PA

License number
Pennsylvania MD071204L
Category
Medicine
Type
Medical Physician and Surgeon
Address
Address
Allentown, PA 18106

Personal information

See more information about ERIC SCOTT LEE at radaris.com
Name
Address
Phone
Eric Lee, age 69
4821 N 8Th St, Philadelphia, PA 19120
(215) 324-1709
Eric Lee
499 W Spring Grove Blvd, Belle Vernon, PA 15012
Eric Lee, age 57
44 Pine Ridge Ct, Enola, PA 17025
(717) 363-3380
Eric Lee
1431 Spruce St, Philadelphia, PA 19102
(267) 909-8887
Eric Lee, age 67
1510 Princess Anne Dr, Lancaster, PA 17601
(717) 397-3645

Professional information

Eric Lee Photo 1

Method Of Testing And Diagnosing Field Programmable Gate Arrays

US Patent:
6108806, Aug 22, 2000
Filed:
Apr 13, 1998
Appl. No.:
9/059552
Inventors:
Miron Abramovici - Berkeley Heights NJ
Eric Seng-Kar Lee - Allentown PA
Charles Eugene Stroud - Lexington KY
Assignee:
Lucent Technologies Inc. - Murray Hill NJ
University of Kentucky Research Foundation - Lexington KY
International Classification:
G01R 3128
US Classification:
714725
Abstract:
A method of testing field programmable gate arrays (FPGAs) includes establishing a first group of programmable logic blocks as test pattern generators or output response analyzers and a second group of programmable logic blocks as blocks under test. This is followed by generating test patterns and comparing outputs of two blocks under test with one output response analyzer. Next is the combining of results of a plurality of output response analyzers utilizing an iterative comparator in order to produce a pass/fail indication. The method also includes the step of reconfiguring each block under test so that each block under test is tested in all possible modes of operation. Further, there follows the step of reversing programming of the groups of programmable logic blocks so that each programmable logic block is configured at least once as a block under test.


Eric Lee Photo 2

Programmable Logic Device Wakeup Using A General Purpose Input/Output Port

US Patent:
8368424, Feb 5, 2013
Filed:
Mar 1, 2011
Appl. No.:
13/038259
Inventors:
Wei Han - Beaverton OR, US
Zheng Chen - Upper Macungie PA, US
Warren Juenemann - Cornelius OR, US
Eric Lee - Allentown PA, US
Assignee:
Lattice Semiconductor Corporation - Hillsboro OR
International Classification:
H03K 19/173
US Classification:
326 38
Abstract:
In one embodiment, a programmable logic device such as an FPGA includes a programmable fabric adapted to operate normally and in a sleep mode, and a general purpose input/output port (I/O). The I/O port is adapted to function in conventional fashion during normal operation of the programmable fabric and as a wakeup control port during the sleep mode.


Eric Lee Photo 3

Eric Lee

Location:
Allentown, Pennsylvania Area
Industry:
Semiconductors
Skills:
FPGA, ASIC