Position:
Component Design Engineer at Intel Corporation
Location:
Sacramento, California Area
Industry:
Information Technology and Services
Work:
Intel Corporation
since Jun 2010
-
Component Design Engineer
Education:
California State University-Sacramento 2007 - 2010
Master of Science (MS), Electrical and Electronics Engineering
California State University-Sacramento 2007 - 2010
MS, Electrical and Electronics Engineering
Dharmsinh Desai University 2002 - 2006
BE, Electronics and Communication Engineering
Skills:
Verilog, ASIC, VHDL, TCL, Perl, Primetime, PCIe, C, SystemVerilog, Static Timing Analysis, VLSI, RTL design, Logic Design, RTL coding, Functional Verification, ModelSim, Physical Design, SoC, Logic Synthesis, Computer Architecture, DFT