DR. DAVID PHILLIP NGUYEN, D.O.
Osteopathic Medicine at Jackson Ave, San Jose, CA

6067594, May 23, 2000

Sep 26, 1997

8/938084

Donald V. Perino - Los Altos CA
Billy Wayne Garrett - Mountain View CA
Haw-Jyh Liaw - Sunnyvale CA
David Nguyen - San Jose CA
Srinivas Nimmagadda - Santa Clara CA
James A. Gasbarro - Mountain View CA
Richard DeWitt Crisp - San Jose CA

Rambus, Inc. - Mountain View CA

H05K 102

710126

A high frequency bus system which insures uniform arrival times of high-fidelity signals to the devices on the high frequency bus, despite the use of the bus on modules and connectors. A high frequency bus system includes a first bus segment having one or more devices connected between a first and a second end. The first bus segment has at least a pair of transmission lines for propagating high frequency signals and the devices are coupled to the pair of transmission lines. The high frequency bus system also includes a second bus segment which has no devices connected to it. The second bus segment also has at least a pair of transmission lines for propagating high frequency signals. The first end of the first segment and second end of the second segment are coupled in series to form a chain of segments and when two signals are introduced to the first end of the second bus segment at the substantially the same time, they arrive at each device connected to the first bus segment at substantially the same time. Also, when two signals originate at a device connected to the first bus segment at substantially the same time, they arrive at the first end of the second bus segment at substantially the same time.

7360050, Apr 15, 2008

Mar 2, 2007

11/681375

Richard M. Barth - Palo Alto CA, US
Frederick A. Ware - Los Altos Hills CA, US
Donald C. Stark - Los Altos CA, US
Craig E. Hampel - San Jose CA, US
Paul G. Davis - San Jose CA, US
Abhijit M. Abhyankar - Sunnyvale CA, US
James A. Gasbarro - Mountain View CA, US
David Nguyen - San Jose CA, US

Rambus Inc. - Los Altos CA

G06F 12/00

711167, 711105, 711169, 365190, 365222

An integrated circuit memory device has a first set of pins to receive, using a clock signal, a row address followed by a column address. The device has a second set of pins to receive, using the clock signal, a sense command and a write command. The sense command specifies that the device activate a row of memory cells identified by the row address. The write command specifies that the memory device receive write data and store the write data at a location, identified by the column address, in the row of memory cells. The write command is posted internally to the memory device after a first delay has transpired from a first time period in which the write command is received at the second set of pins. The write data is received at a third set of pins after a second delay has transpired from the first time period.

2008031, Dec 25, 2008

Apr 30, 2008

12/113023

Abraham Ma - Fremont CA, US
I-Kang Yu - Palo Alto CA, US
David Nguyen - San Jose CA, US
Charles C. Lee - Cupertino CA, US
Ming-Shiang Shen - Taipei Hsien, TW

SUPER TALENT ELECTRONICS, INC. - San Jose CA

H01R 24/00, H01R 12/00, G06K 9/00

439 78, 439660, 382124

A multi-level cell (MLC) dual-personality extended External Serial Advanced Technology Attachment (eSATA) flash drive includes a MLC dual-personality extended eSATA plug connector connected to a flash drive and removably connectable to a host. The connector is adaptable to receive electoral data from both a USB and eSATA interface.

6998892, Feb 14, 2006

Feb 13, 2002

10/075531

David Nguyen - San Jose CA, US
Suresh Rajan - San Jose CA, US

Rambus Inc. - Los Altos CA

H03L 7/00

327161, 713401

A method and apparatus for accommodating delay variations among multiple signals are provided. According to one embodiment of the invention, transitions of one or more of a plurality of lines between different levels are detected. The timing of a signal affecting recovery of information from the plurality of lines is adjusted according to the transitions detected. Examples of such a signal include one or more signals carried on one or more of the plurality of lines and a timing signal carried on a line separate from the plurality of lines.

7806705, Oct 5, 2010

Oct 22, 2009

12/604309

Frank I-Kang Yu - Palo Alto CA, US
David Nguyen - San Jose CA, US
Jim Chin-Nan Ni - San Jose CA, US
Abraham C. Ma - Fremont CA, US
Ming-Shiang Shen - Taipei, TW

Super Talent Electronics, Inc. - San Jose CA

H01R 13/44

439131

A portable USB device with an improved configuration is described herein. According to one embodiment, a portable USB device includes a core unit having a USB plug connector coupled to one or more flash memory devices and a flash controller disposed therein, where the flash controller is capable of exchanging data with a host via the USB plug connector using a bulk-only-transfer protocol. The portable USB device further includes a housing for enclosing the core unit, including a front end opening to allow the USB plug connector to be deployed. The portable USB device further includes a core unit carrier for carrying the core unit for deploying and retracting the core unit, including a slide button to allow a finger of a user to slide the USB plug connector of the core unit in and out of the housing via the front end opening of the housing.

7170314, Jan 30, 2007

Feb 11, 2005

11/054955

Belgacem Haba - Cupertino CA, US
Richard E. Perego - San Jose CA, US
David Nguyen - San Jose CA, US
Ely Tsern - Los Altos CA, US
Crag E. Hampel - San Jose CA, US

Rambus Inc. - Los Altos CA

H03K 17/16, H03K 19/003

326 30, 333247, 174250

Various module structures are disclosed which may be used to implement modules having 1 to N channels. Bus systems may be formed by the interconnection of such modules.