BRUCE CARLTON ROBERTS
Pilots at Cory Ave, San Jose, CA

6655854, Dec 2, 2003

Aug 3, 2001

09/922357

Luu Thanh Nguyen - Sunnyvale CA
Ken Pham - San Jose CA
Peter Deane - Los Altos CA
William Paul Mazotti - San Martin CA
Bruce Carlton Roberts - San Jose CA

National Semiconductor Corporation - Santa Clara CA

G02B 636

385 88, 385 49, 385 92, 438 26, 438 27, 438 29

An optoelectronic component is described that includes a photonic device carried by a base substrate. A dam structure is formed on the base substrate by dispensing and hardening a precise amount of a flowable material. The dam structure is sized to define a desired standoff between an optical fiber and an active facet on the photonic device. In embodiments where the photonic device is wire bonded to the base substrate, it may be desirable to provide a reverse wire bond in order to permit the optical fiber to be placed closer to the photonic device. In some embodiments, the base substrate takes the form of a flexible material having electrically conductive traces thereon that are electrically connected to the photonic device. An optical component support block may be provided to support the flex material. In some implementations, a semiconductor die may be directly soldered to the traces on the flexible material.

6642613, Nov 4, 2003

Sep 4, 2001

09/947210

Luu Thanh Nguyen - Sunnyvale CA
Ken Pham - San Jose CA
Peter Deane - Los Altos CA
William Paul Mazotti - San Martin CA
Bruce Carlton Roberts - San Jose CA
Jia Liu - San Jose CA

National Semiconductor Corporation - Santa Clara CA

H01L 2302

257686, 257777

The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.

6628000, Sep 30, 2003

Nov 19, 2001

10/006443

Ken Pham - San Jose CA
Jia Liu - San Jose CA
Luu Thanh Nguyen - Sunnyvale CA
William Paul Mazotti - San Martin CA
Bruce Carlton Roberts - San Jose CA

National Semiconductor Corporation - Santa Clara CA

H01L 23544

257797, 257666, 257432, 438 65, 438111

Techniques for maintaining the optical coupling efficiency between photonic devices of an optoelectronic module and its interconnecting optical fibers are described. The techniques ensure that the mating surfaces of an optical sub-assembly and a chip sub-assembly remain planar to each other throughout and after the soldering process of the optoelectronic manufacturing process. These techniques include the use of a ceramic fixture made of a stack of plates having openings that secure the orientation of the optical and chip sub-assemblies. The fixture can have one or more openings to secure a respective one or more combination of optical and chip sub-assemblies. A high temperature tape can also be used to maintain the parallelism between the optical and chip sub-assemblies. An optical sub-assembly having pedestals on its bottom surface can also be use to maintain parallelism of the optical and chip sub-assemblies. Methods of using each technique is also described.

6916121, Jul 12, 2005

Jun 6, 2002

10/165553

William Paul Mazotti - San Martin CA, US
Peter Deane - Los Altos CA, US
Luu Thanh Nguyen - Sunnyvale CA, US
Ken Pham - San Jose CA, US
Bruce Carlton Roberts - San Jose CA, US
Jia Liu - San Jose CA, US
Yongseon Koh - Sunnyvale CA, US
John P. Briant - Cambridge, GB
Roger William Clarke - Cambridge, GB
Michael R. Nelson - Cambridge, GB
Christopher J. Smith - Swaffham Prior, GB
Janet E. Townsend - Fulbourn, GB

National Semiconductor Corporation - Santa Clara CA

H01L023/12, H01L023/28

385 88, 385 49, 385 89, 385 90, 385 92

Concepts for conveniently arranging devices for the transduction of signals to and from voltage and current domains to infrared radiation domains is described. Specifically, optoelectronic components and methods of making the same are described. In one aspect, the optoelectronic component includes a base substrate having a pair of angled (or substantially perpendicular) faces with electrical traces extending therebetween. A semiconductor chip assembly is mounted on the first face of the base substrate and a photonic device is mounted on the second face. Both the semiconductor chip assembly and the photonic device are electrically connected to traces on the base substrate. The semiconductor chip assembly is generally arranged to be electrically connected to external devices. The photonic devices are generally arranged to optically communicate with one or more optical fibers. The described structure may be used with a wide variety of photonic devices.

7086788, Aug 8, 2006

Mar 30, 2005

11/095637

William Paul Mazotti - San Martin CA, US
Peter Deane - Los Altos CA, US
Luu Thanh Nguyen - Sunnyvale CA, US
Ken Pham - San Jose CA, US
Bruce Carlton Roberts - San Jose CA, US
Jia Liu - San Jose CA, US
Yongseon Koh - Sunnyvale CA, US
John P. Briant - Cambridge, GB
Roger William Clarke - Cambridge, GB
Michael R. Nelson - Cambridge, GB
Christopher J. Smith - Swaffham Prior, GB
Janet E. Townsend - Fulbourn, GB

National Semiconductor Corporation - Santa Clara CA

G02B 6/36

385 92, 385 88

Concepts for conveniently arranging devices for the transduction of signals to and from voltage and current domains to infrared radiation domains is described. Specifically, optoelectronic components and methods of making the same are described. In one aspect, the optoelectronic component includes a base substrate having a pair of angled (or substantially perpendicular) faces with electrical traces extending therebetween. A semiconductor chip assembly is mounted on the first face of the base substrate and a photonic device is mounted on the second face. Both the semiconductor chip assembly and the photonic device are electrically connected to traces on the base substrate. The semiconductor chip assembly is generally arranged to be electrically connected to external devices. The photonic devices are generally arranged to optically communicate with one or more optical fibers. The described structure may be used with a wide variety of photonic devices.

7086786, Aug 8, 2006

May 18, 2004

10/849338

Neeraj Anil Pendse - Mountain View CA, US
Bruce Carlton Roberts - San Jose CA, US
Jia Liu - San Jose CA, US
Lionel Auzereau - Le Cannet, FR
Christopher Barratt - Villeneuve-Loubet, FR

National Semiconductor Corporation - Santa Clara CA

G02B 6/36

385 89, 385 53, 385 88

A high performance ceramic block for use with small-scale circuitry is described. The block can be used in an optical sub-assembly (OSA) suitable for optical interconnection with optical fibers and electrical interconnection with a chip sub-assembly (CSA) is formed. The block includes a first surface and a second surface and is formed using one of low temperature co-fired ceramic (LTCC) and high temperature co-fired ceramic (HTCC) techniques. Photonic devices are formed on the first surface of the ceramic block and electrical contacts are formed on a second surface of the block. The electrical contacts being suitable for electrical communication with a chip sub-assembly. Electrical connections are formed so that they pass internally through the ceramic block to electrically interconnect the photonic devices on the first face of the block with the electrical contacts on the second face of the block. Such a block can be advantageously used to form an optoelectronic module.

6858468, Feb 22, 2005

Apr 11, 2003

10/412564

Luu Thanh Nguyen - Sunnyvale CA, US
Ken Pham - San Jose CA, US
Peter Deane - Los Altos CA, US
William Paul Mazotti - San Martin CA, US
Bruce Carlton Roberts - San Jose CA, US
Jia Liu - San Jose CA, US

National Semiconductor Corporation - Santa Clara CA

H01L023/495, H01L023/02, H01L021/44, H01L021/30

438108, 257666, 257777, 257778, 438107, 438110, 438455

The present invention provides a technique for manufacturing a low cost device that provides a true die to external fiber optic connection. Specifically, the present invention relates to several techniques for joining an optical device package to a semiconductor device package. The first technique involves using wirebond studs and an adhesive material, the second technique involves the use of an anisotropic conductive film, and the third technique involves the use of solder material. Each of these techniques provides high levels of thermal, electrical and optical performance. The methods apply to optical sub-assembly and chip sub-assembly interfaces in transceivers, transmitters, as well as receivers for opto-electronic packages.