YAN WANG
Acupuncture at Fremont Ave, Sunnyvale, CA
License number
California 16099
Category
Acupuncture
Type
Acupuncturist
Address
Address
2
690 W Fremont Ave STE 4, Sunnyvale, CA 94087
1010 Springfield Dr, Campbell, CA 95008
1010 Springfield Dr, Campbell, CA 95008
Phone
(408) 207-8753
Professional information
Senior Qa Engineer At Gigamon
Position:
Senior QA Engineer at Gigamon
Location:
Sunnyvale, California
Industry:
Computer Networking
Work:
Gigamon
- Milpitas since Nov 2012
-
Senior QA Engineer
Juniper Networks Co., Ltd
- Sunnyvale CA Nov 2010 - Nov 2012
-
Test Engineer
Broadcom Corporation
- Morrisville, NC May 2010 - Aug 2010
-
Test Team Software QA Intern
Juniper Networks Co., Ltd
Feb 2006 - Aug 2008
-
Firewall Test Team Software QA Engineer
Huawei-3Com Technology Co., Ltd
Aug 2004 - Feb 2006
-
Audio & Video Products Department Software QA Engineer
Guangdong BBK Electronics Corp., Ltd
Sep 2003 - Jun 2004
-
Test Manager at Data Center
Education:
North Carolina State University 2009 - 2010
MS, Computer Networking
MS, Computer Networking
Interests:
Taichi (Taiji), Latin Dancing
Honor & Awards:
JNCIS-FWV (Juniper Networks Certified Internet Specialist-Firewall/VPN) 96/100.
Methods And Apparatus For Electroprocessing With Recessed Bias Contact
US Patent:
2007021, Sep 20, 2007
Filed:
Mar 17, 2006
Appl. No.:
11/377990
Inventors:
Yan Wang - Sunnyvale CA, US
Alain Duboust - Sunnyvale CA, US
Antoine Manens - Sunnyvale CA, US
Alain Duboust - Sunnyvale CA, US
Antoine Manens - Sunnyvale CA, US
International Classification:
C25C 7/02, B23H 5/06
US Classification:
205662000, 204280000
Abstract:
A method and apparatus are provided for electroprocessing with recessed bias contact. In one embodiment, the apparatus includes a platen, a processing pad disposed on the platen and having at least a first aperture and a second aperture formed therethrough, a first electrode positioned under the processing pad and exposed to a polishing surface of the processing pad through the first aperture, wherein an upper surface of the first electrode is recessed from the polishing surface; a plurality of second electrodes exposed to the polishing surface through the second aperture, wherein upper surfaces of the second electrodes are recessed from the polishing surface, and an electrical circuit coupled to the first and second electrodes and configured to bias each of the second electrodes independently relative to the first electrode.
Methods Of Incorporating Process-Induced Layout Dimension Changes Into An Integrated Circuit Simulation Netlist
US Patent:
7765498, Jul 27, 2010
Filed:
May 24, 2007
Appl. No.:
11/805739
Inventors:
Jonathan J. Ho - Fremont CA, US
Yan Wang - Campbell CA, US
Xin X. Wu - Fremont CA, US
Jane W. Sowards - Fremont CA, US
Yan Wang - Campbell CA, US
Xin X. Wu - Fremont CA, US
Jane W. Sowards - Fremont CA, US
Assignee:
XILINX, Inc. - San Jose CA
International Classification:
G06F 17/50
US Classification:
716 3, 716 7, 716 11
Abstract:
Computer-implemented methods of generating netlists for use in post-layout simulation procedures. A lookup table includes a predetermined set of features (e. g. , transistors of specified sizes and shapes) supported by an integrated circuit (IC) fabrication process, with dimensions and process induced dimension variations being included for each feature. A netlist is extracted from an IC layout, the extracted netlist specifying circuit elements (e. g. , transistors) implemented by the IC layout and interconnections between the circuit elements. A search pattern is run on the IC layout to identify features in the IC layout corresponding to features included in the lookup table. Circuit elements in the extracted netlist that correspond to the identified features are then modified using values from the lookup table, and the modified netlist is output. In some embodiments, the netlist extraction, search pattern, and netlist modification are all performed as a single netlist generation step.
System And Method For In-Situ Head Rinse
US Patent:
2008000, Jan 3, 2008
Filed:
Nov 22, 2006
Appl. No.:
11/562811
Inventors:
Antoine Manens - Sunnyvale CA, US
Alain Duboust - Sunnyvale CA, US
Paul Butterfield - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Shi-Ping Wang - Fremont CA, US
Zhihong Wang - Santa Clara CA, US
Andrew Nagengast - Sunnyvale CA, US
Liang-Yuh Chen - Foster City CA, US
Alain Duboust - Sunnyvale CA, US
Paul Butterfield - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Shi-Ping Wang - Fremont CA, US
Zhihong Wang - Santa Clara CA, US
Andrew Nagengast - Sunnyvale CA, US
Liang-Yuh Chen - Foster City CA, US
International Classification:
B24B 53/007
US Classification:
451444000
Abstract:
A carrier head and a method of cleaning the carrier head are disclosed. The carrier head may have one or more openings through a sidewall that extend into a cavity within the carrier head using a fluid passage. The openings may each have a lip. The lip may have a chamfered edge. Additionally, a fluid passage may slope generally downward from the openings to the cavity. The chamfered lips and the sloped fluid passage reduce back splashing and help ensure that sufficient rinsing fluid reaches the cavity to rinse polishing fluid and particles from the carrier head. The present invention relates to carrier heads for polishing or planarizing semiconductor substrates by chemical mechanical polishing (CMP) or electrochemical mechanical polishing (ECMP). The cavities in the carrier head are cleaned by rinsing fluid (i.e., liquid or gas) from inside the cavity towards a substrate receiving side of the carrier head.
Method And Apparatus For Local Polishing Control
US Patent:
2011005, Mar 3, 2011
Filed:
Nov 8, 2010
Appl. No.:
12/941816
Inventors:
STAN TSAI - Fremont CA, US
Feng Q. Liu - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Rashid Mavliev - Campbell CA, US
Liang-Yuh Chen - Foster City CA, US
Alain Duboust - Sunnyvale CA, US
Feng Q. Liu - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Rashid Mavliev - Campbell CA, US
Liang-Yuh Chen - Foster City CA, US
Alain Duboust - Sunnyvale CA, US
International Classification:
B24B 1/00, B24D 11/00
US Classification:
451 41, 451526
Abstract:
A method and apparatus for local polishing and deposition control in a process cell is generally provided. In one embodiment, an apparatus for electrochemically processing a substrate is provided that selectively polishes discrete conductive portions of a substrate by controlling an electrical bias profile across a processing area, thereby controlling processing rates between two or more conductive portions of the substrate.
Hydrogen Bubble Reduction On The Cathode Using Double-Cell Designs
US Patent:
7229535, Jun 12, 2007
Filed:
Jun 6, 2003
Appl. No.:
10/455861
Inventors:
Yan Wang - Sunnyvale CA, US
Feng Q. Liu - San Jose CA, US
Alain Duboust - Sunnyvale CA, US
Siew S. Neo - Santa Clara CA, US
Liang-Yuh Chen - Foster City CA, US
Yongqi Hu - Campbell CA, US
Feng Q. Liu - San Jose CA, US
Alain Duboust - Sunnyvale CA, US
Siew S. Neo - Santa Clara CA, US
Liang-Yuh Chen - Foster City CA, US
Yongqi Hu - Campbell CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
C25F 7/00, B23H 5/06, C25F 3/00, C25F 3/12, C25F 3/30, B23H 3/00
US Classification:
204252, 204224 M, 205662, 205663
Abstract:
An apparatus and method for planarizing a surface of a substrate using a chamber separated into two parts by a membrane, and two separate electrolytes is provided. The embodiments of the present invention generally provide an electrochemical mechanical polishing system that reduces the number of defects found on the substrate surface after polishing. An exemplary electrochemical apparatus includes a physical barrier that prevents any trapped gas or gas generated during processing from residing in areas that can cause defects on the substrate. The process can be aided by the addition of various chemical components to the electrolyte that tend to reduce the gas generation at the cathode surface during the ECMP anodic dissolution process.
Integrated Signal Analyzer For Adaptive Control Of Mixed-Signal Integrated Circuit
US Patent:
8145150, Mar 27, 2012
Filed:
Dec 19, 2008
Appl. No.:
12/340032
Inventors:
Qian Yu - Santa Clara CA, US
Abhijit G. Shanbhag - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Abhijit G. Shanbhag - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Assignee:
Scintera Networks, Inc. - Sunnyvale CA
International Classification:
H04B 1/04
US Classification:
4551143, 455558, 375216, 375298, 375326
Abstract:
A mixed-signal adaptive integrated circuit may comprise a primary function circuit, a digitally controlled analog sub-system cooperatively connected with the primary function circuit, and an on-chip signal analyzer. The on-chip signal analyzer may be arranged to analyze RF signals. The signal analyzer may comprise at least one multiplexor for selecting selected RF signals for comparison and analysis, and may comprise a digital signal processor (DSP) for analyzing the selected RF signals and adjusting at least one operational parameter of the digitally controlled analog sub-system responsive to the analysis.
Method And Apparatus For Local Polishing Control
US Patent:
7842169, Nov 30, 2010
Filed:
Mar 4, 2003
Appl. No.:
10/382032
Inventors:
Stan Tsai - Fremont CA, US
Feng Q. Liu - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Rashid Mavliev - Campbell CA, US
Liang-Yuh Chen - Foster City CA, US
Alain Duboust - Sunnyvale CA, US
Feng Q. Liu - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Rashid Mavliev - Campbell CA, US
Liang-Yuh Chen - Foster City CA, US
Alain Duboust - Sunnyvale CA, US
Assignee:
Applied Materials, Inc. - Santa Clara CA
International Classification:
C25F 3/30
US Classification:
204224M, 2042281, 2042289, 204260, 204272, 205640, 205641, 205646
Abstract:
A method and apparatus for local polishing and deposition control in a process cell is generally provided. In one embodiment, an apparatus for electrochemically processing a substrate is provided that selectively polishes discrete conductive portions of a substrate by controlling an electrical bias profile across a processing area, thereby controlling processing rates between two or more conductive portions of the substrate.
Method And Apparatus For Local Polishing Control
US Patent:
2006012, Jun 15, 2006
Filed:
Jan 31, 2006
Appl. No.:
11/343360
Inventors:
Stan Tsai - Fremont CA, US
Feng Liu - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Rashid Mavliev - Campbell CA, US
Liang-Yuh Chen - Foster City CA, US
Alain Duboust - Sunnyvale CA, US
Feng Liu - San Jose CA, US
Yan Wang - Sunnyvale CA, US
Rashid Mavliev - Campbell CA, US
Liang-Yuh Chen - Foster City CA, US
Alain Duboust - Sunnyvale CA, US
International Classification:
B23H 3/00
US Classification:
205686000
Abstract:
A method and apparatus for local polishing and deposition control in a process cell is generally provided. In one embodiment, an apparatus for electrochemically processing a substrate is provided that selectively polishes discrete conductive portions of a substrate by controlling an electrical bias profile across a processing area, thereby controlling processing rates between two or more conductive portions of the substrate.
Contact Assembly Cleaning In An Electrochemical Mechanical Processing Apparatus
US Patent:
2007008, Apr 19, 2007
Filed:
Oct 14, 2005
Appl. No.:
11/251581
Inventors:
Antoine Manens - Sunnyvale CA, US
Alain Duboust - Sunnyvale CA, US
Paul Butterfield - San Jose CA, US
Ricardo Martinez - Manteca CA, US
Yan Wang - Sunnyvale CA, US
Alain Duboust - Sunnyvale CA, US
Paul Butterfield - San Jose CA, US
Ricardo Martinez - Manteca CA, US
Yan Wang - Sunnyvale CA, US
International Classification:
C25D 21/06
US Classification:
205098000, 204247200
Abstract:
Embodiments of the invention generally provide a method and apparatus for cleaning an electrical contact in an electrochemical mechanical planarizing apparatus. In one embodiment, a method for cleaning a contact assembly in an electroprocessing apparatus includes the steps of draining electrolyte from the contact assembly and flowing a rinsing fluid into the contact assembly. In another embodiment, a method for cleaning a contact assembly in an electroprocessing apparatus includes the steps of preventing fluid from passing between an interface of the contact assembly and a pad disposed outward thereof, flowing a rinsing fluid into the contact assembly and draining fluid flowing out of the contact assembly.