DR. WILLIAM L LEE, PHARM.D.
Pharmacy at Causeway St, Boston, MA

4092601, May 30, 1978

Jun 1, 1976

5/691581

William H. Lee - Boston MA
Duncan B. Cox - Manchester MA

The Charles Stark Draper Laboratory, Inc. - Cambridge MA

H04L 704

325322

A code tracking signal processing system for tracking a coded signal of the pseudo-random-noise, or PRN, type wherein a time shift comparison is made of the input coded signal and a pair of time estimated coded feedback signals which represent an estimate of the coded input signal which has been advanced and delayed, respectively, by the same specified time shift. An effective error signal is formed from the time shift comparison signals and supplied to a digital integration means, such as an up-down counter, to generate a pair of control signals. The control signals control the pulse rate of a pulsed clock signal in accordance with the time shift error between the estimated code signal and the input code signal. The controlled pulse rate signal is then used to generate the advanced and delayed feedback signals and to produce a coded signal which is in effect locked into time synchronism with the input coded signal.

4066978, Jan 3, 1978

Jan 24, 1977

5/761853

Duncan B. Cox - Manchester MA
William H. Lee - Boston MA

The Charles Stark Draper Laboratory, Inc. - Cambridge MA

H03B 304

331 1A

A phase processing system which includes at least one digital phase-locked loop wherein the phase of the input signal to the loop is compared with the phase of the loop output signal to produce a pulse-width modulated phase error signal. The error signal is digitally integrated, as by a counting means which cyclically counts the pulse widths thereof and provides a first control signal when the count reaches a first value and a second control signal when the count reaches a second value. The control signals are used to control the pulse rate of a clock signal to produce an intermediate clock signal such that when the first control signal is present a pulse is added thereto and when the second control signal is present a pulse is deleted therefrom. The intermediate clock signal is then fed to a feedback divider counting means which provides the loop output signal.

4019153, Apr 19, 1977

Oct 7, 1974

5/512733

Duncan B. Cox - Manchester MA
William H. Lee - Boston MA

The Charles Stark Draper Laboratory, Inc. - Cambridge MA

H03B 304

331 1A

A phase processing system which includes at least one digital phase-locked loop wherein the phase of the input signal to the loop is compared with the phase of the loop output signal to produce a pulse-width modulated phase error signal. The error signal is digitally integrated, as by a counting means which cyclically counts the pulse widths thereof and provides a first control signal when the count reaches a first value and a second control signal when the count reaches a second value. The control signals are used to control the pulse rate of a clock signal to produce an intermediate clock signal such that when the first control signal is present a pulse is added thereto and when the second control signal is present a pulse is deleted therefrom. The intermediate clock signal is then fed to a feedback divider counting means which provides the loop output signal.