DR. WILLIAM JOSIAH TAYLOR, M.D.
Marriage and Family Therapists in Austin, TX

License number
Texas F3357
Category
Osteopathic Medicine
Type
Family Medicine
Address
Address
9442 N Arboretum Plaza 2 SUITE 500, Austin, TX 78759
Phone
(512) 349-4807
(512) 349-4851 (Fax)

Professional information

See more information about WILLIAM JOSIAH TAYLOR at trustoria.com
William Taylor Photo 1
Vp At Comerica

Vp At Comerica

Position:
vp at Comerica
Location:
Austin, Texas Area
Industry:
Automotive
Work:
Comerica - vp
Education:
Maryville University of Saint Louis 1985 - 1992


William Taylor Photo 2
President At Taylormade Gardens

President At Taylormade Gardens

Position:
president at taylormade gardens
Location:
Austin, Texas Area
Industry:
Architecture & Planning
Work:
taylormade gardens - president
Education:
UCSB


William Paul Taylor Photo 3
William Paul Taylor, Austin TX - Lawyer

William Paul Taylor, Austin TX - Lawyer

Address:
TASB Risk Management
PO Box 301, Austin 78767
(512) 467-3663
Licenses:
Texas - Eligible To Practice In Texas 1993
Education:
University of Texas School of LawDegree Doctor of Jurisprudence/Juris Doctor (J.D.)Graduated 1993
Specialties:
Insurance - 50%
Education - 50%
Languages:
Spanish


William P Taylor Photo 4
Dr. William P Taylor - MD (Doctor of Medicine)

Dr. William P Taylor - MD (Doctor of Medicine)

Hospitals:
Texas Orthopedics
4700 Seton Center Pkwy SUITE 200, Austin 78759
Texas Orthopedic Associates
2120 N Mays St SUITE 100, Round Rock 78664
Seton Medical Center Austin
1201 West 38Th St, Austin 78705
Seton Northwest Hospital
11113 Research Blvd, Austin 78759
Texas Orthopedics
4700 Seton Center Pkwy SUITE 200, Austin 78759
Texas Orthopedic Associates
2120 N Mays St SUITE 100, Round Rock 78664
Seton Medical Center Austin
1201 West 38Th St, Austin 78705
Seton Northwest Hospital
11113 Research Blvd, Austin 78759
Education:
Medical Schools
Baylor University
Graduated: 1978
University of Texas Southwestern Medical Center At Dallas
Graduated: 1968


William Taylor Photo 5
Process For Forming An Electronic Device Including Semiconductor Layers Having Different Stresses

Process For Forming An Electronic Device Including Semiconductor Layers Having Different Stresses

US Patent:
7560318, Jul 14, 2009
Filed:
Mar 13, 2006
Appl. No.:
11/374372
Inventors:
Mariam G. Sadaka - Austin TX, US
Venkat R. Kolagunta - Austin TX, US
William J. Taylor - Austin TX, US
Victor H. Vartanian - Austin TX, US
Assignee:
Freescale Semiconductor, Inc. - Austin TX
International Classification:
H01L 21/84
US Classification:
438151, 438285, 257E21561
Abstract:
An electronic device can have an insulating layer lying between a first semiconductor layer and a base layer. A second semiconductor layer, having a different composition and stress as compared to the first semiconductor layer, can overlie at least a portion of the first semiconductor layer. In one embodiment, a first electronic component can include a first active region that includes a first portion of the first and the second semiconductor layers. A second electronic component can include a second active region that can include a second portion of the first semiconductor layer. Different processes can be used to form the electronic device. In another embodiment, annealing a workpiece can be performed and the stress of at least one of the semiconductor layers can be changed. In a different embodiment, annealing the workpiece can be performed either before or after the formation of the second semiconductor layer.


William Taylor Photo 6
System And Method For Risk Adjusted Cost Index Measurements For Health Care Providers

System And Method For Risk Adjusted Cost Index Measurements For Health Care Providers

US Patent:
2008001, Jan 10, 2008
Filed:
Jul 6, 2007
Appl. No.:
11/774466
Inventors:
Laurence Williams - McKinney TX, US
Melissa Phillips - Murphy TX, US
William Taylor - Austin TX, US
Freda Wright - Dallas TX, US
Donald Hatfield - Dallas TX, US
International Classification:
G06Q 40/00, G06Q 10/00
US Classification:
705004000
Abstract:
An improved method of evaluating and comparing the cost-effectiveness of healthcare providers across a wide spectrum of specialties and health conditions of their patients. The method includes the steps of determining criteria for determining a provider's relative cost-effectiveness at providing healthcare at a reasonable cost, and then applying those criteria to assign or exclude a provider from a preferred network of healthcare providers that have an established history of providing the same care at a lower cost than other providers.


William Taylor Photo 7
Splice Assembly With Shield Sock

Splice Assembly With Shield Sock

US Patent:
8445783, May 21, 2013
Filed:
Feb 2, 2010
Appl. No.:
12/698791
Inventors:
William L. Taylor - Austin TX, US
Carl J. Wentzel - Austin TX, US
Kim P. Mulvey - Austin TX, US
Assignee:
3M Innovative Properties Company - St. Paul MN
International Classification:
H02G 15/02
US Classification:
174 93, 174 84 R, 174 75 R, 174 78, 174 88 R
Abstract:
An assembly is provided that includes a tubular support core, a splice body configured to circumferentially surround the support core, a conductive shield sock comprising at least two overlapping layers and configured to circumferentially surround the splice body and a cold shrink jacket circumferentially surrounding the shield sock. The ends of the shield sock are located beneath the cold shrink jacket and the shield sock extends beyond both ends of the splice body. In some embodiments the shield sock includes folded portions that extend beyond the ends of the splice body.


William Taylor Photo 8
Process For Fabricating A Non-Volatile Memory Cell In A Semiconductor Device

Process For Fabricating A Non-Volatile Memory Cell In A Semiconductor Device

US Patent:
5633186, May 27, 1997
Filed:
Aug 14, 1995
Appl. No.:
8/515077
Inventors:
Danny P. C. Shum - Austin TX
Ko-Min Chang - Austin TX
William J. Taylor - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 218247, H01L 21265
US Classification:
438264
Abstract:
A process for fabricating a non-volatile memory cell (10) in a semiconductor device includes the formation of a doped region (28) in a semiconductor substrate (40) underlying a floating gate electrode (16) and separated therefrom by a tunnel dielectric layer (44). Stress induced failure of the tunnel dielectric layer (44) is avoided by laterally diffusing dopant atoms under the floating gate electrode (16) after completely fabricating both the floating gate electrode (16) and the underlying tunnel dielectric layer (44).


William Taylor Photo 9
Twist Grip Steerable, Lever-Driven Wheelchair

Twist Grip Steerable, Lever-Driven Wheelchair

US Patent:
8113528, Feb 14, 2012
Filed:
Apr 22, 2011
Appl. No.:
13/092482
Inventors:
William Taylor - Lakeway TX, US
International Classification:
B62M 1/16
US Classification:
2802501, 280211, 280244, 280282
Abstract:
A racing wheelchair is disclosed. The racing wheelchair may have a pair of rear wheels and a steerable single front wheel. The rear wheels may be independently driven by a lever, through a derailer and a chain, such that pushing one of the two levers will move one of the wheels but not the other. The front wheel is steerable by twist grips located at the removed end of the levers. Brake assemblies and shifter assemblies of the derailers are located adjacent the twist grip, and may be rigidly mounted to the push lever or mounted to the twist grip to rotate therewith.