Position:
Hardware Design Verification at Intel
Work:
Intel
since Nov 2008
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Hardware Design Verification
Xilinx
Jan 2008 - Oct 2008
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Verification Lead/Manager
Montalvo Systems
May 2006 - Jan 2008
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Member of Technical Staff
Azul Systems
Sep 2004 - May 2006
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Sr. Hardware Engineer
Broadcom Corporation
Jan 2004 - Sep 2004
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Sr. Hardware Engineer
Redback Networks
Oct 2000 - Jan 2004
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Sr. Hardware Engineer
Cisco Systems
Sep 1995 - Oct 2000
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Hardware Engineer
Education:
Santa Clara University 1997 - 2001
MSEMGT, marketing,program management
San Francisco State University 1991 - 1994
BSEE, Logic Design
Skills:
SystemVerilog, ASIC, SoC, VCS, X86, Verilog, Perl, RTL design, Functional Verification, Scripting, Shell Scripting, Microprocessors, Semiconductors, ModelSim, Python