MR. WEN RUEY KO, M.D.
Psychiatric at Ostenberg Dr, San Jose, CA

6017437, Jan 25, 2000

Aug 22, 1997

8/916564

Chiu H. Ting - Saratoga CA
William H. Holtkamp - San Jose CA
Wen C. Ko - San Jose CA
Kenneth J. Lowery - San Dimas CA
Peter Cho - Los Angeles CA

Cutek Research, Inc. - San Jose CA

C25D 700, C25D 502, C25D 712, C25F 330

205 80

A processing chamber for depositing and/or removing material onto/from a semiconductor wafer when the wafer is subjected to an electrolyte and in an electric field. A hollow sleeve is utilized to form a containment chamber for holding the electrolyte. A wafer residing on a support is moved vertically upward to engage the sleeve to form an enclosing floor for the containment chamber. One electrode is disposed within the containment chamber while the opposite electrode is comprised of several electrodes distributed around the circumference of the wafer. The electrodes are also protected from the electrolyte when the support is raised and engaged to the sleeve. In one embodiment, the support and the sleeve are stationary during processing, while in another embodiment, both are rotated or oscillated during processing.

6022465, Feb 8, 2000

Jun 1, 1998

9/088319

Chiu H. Ting - Saratoga CA
William H. Holtkamp - San Jose CA
Wen C. Ko - San Jose CA

Cutek Research, Inc. - San Jose CA

C25D 502

205118

An apparatus and method for customizing electrode contact placement on a semiconductor wafer while depositing and/or removing a material on a semiconductor wafer. The present invention is a adapter having at least one opening through which at least one electrode contacts the semiconductor wafer. The adapter may be designed to have multiple openings at specified locations on the adapter, thus allowing multiple electrode contacts with the semiconductor wafer at pre-specified locations. A conductive sheet may couple with the adapter to carry an electrical current from an electrical conductor to the electrode contacts placed within the openings of the adapter.

4616404, Oct 14, 1986

Nov 30, 1984

6/676684

Scott W. Wang - Sunnyvale CA
Mammen Thomas - San Jose CA
Wen C. Ko - San Jose CA

Advanced Micro Devices, Inc. - Sunnyvale CA

H01L 21265, H01L 21425

29576B

An improved lateral polysilicon diode in an integrated circuit structure is disclosed. The diode is characterized by low reverse current leakage, a breakdown voltage of at least 5 volts, and low series resistance permitting high current flow before being limited by saturation. The polysilicon diode comprises a polysilicon substrate having a first zone sufficiently doped to provide a first semiconductor type and a second zone sufficiently doped to provide a second semiconductor type whereby the junction between the two zones forms a diode. The lateral edges of the diode are treated to remove defects to thereby inhibit current leakage around the edges of the lateral diode to lower the reverse current leakage of the diode.

4669180, Jun 2, 1987

Dec 18, 1984

6/683431

Mammen Thomas - San Jose CA
Wen C. Ko - San Jose CA

Advanced Micro Devices, Inc. - Sunnyvale CA

H01L 2144

29577C

An improved ECL bipolar memory cell is disclosed which comprises connecting the respective collectors of the memory transistors in the flip-flop circuit to bit lines using Schottky diodes to protect against latch-up of the ECL cell; and the inversion of the transistors in the circuits to provide a buried emitter construction for alpha strike protection. In a preferred embodiment, the Schottky diode and the load devices, such as resistors or load transistors used to coupled the cell to one of the word lines are made using polysilicon to facilitate construction of the cell, reduce the total number of contacts needed, and enhance the speed of the cell.

6077412, Jun 20, 2000

Oct 30, 1998

9/183754

Chiu H. Ting - Saratoga CA
William H. Holtkamp - Santa Clara CA
Wen C. Ko - San Jose CA

Cutek Research, Inc. - San Jose CA

C25D 500, C25D 520, C25D 1700, C25F 330, C25F 700

205143

A processing chamber for depositing and/or removing material onto/from a semiconductor wafer when the wafer is subjected to an electrolyte and in an electric field, and in which a rotating anode is used to agitate and distribute the electrolyte. A hollow sleeve is utilized to form a containment chamber for holding the electrolyte. A wafer residing on a support is moved vertically upward to engage the sleeve to form an enclosing floor for the containment chamber. One electrode is disposed within the containment chamber while the opposite electrode is comprised of several electrodes distributed around the circumference of the wafer. The electrodes are also protected from the electrolyte when the support is raised and engaged to the sleeve. In one embodiment, the support and the sleeve are stationary during processing, while a rotating anode is used to agitate and distribute the electrolyte. With a stationary sleeve, fluid feed and evacuation lines can be coupled through the sleeve to access the containment chamber.

4635230, Jan 6, 1987

Dec 18, 1984

6/683287

Mammen Thomas - San Jose CA
Wen C. Ko - San Jose CA

Advanced Micro Devices, Inc. - Sunnyvale CA

G11C 1140

365175

An improved ECL bipolar memory cell is disclosed which comprises connecting the respective collectors of the memory transistors in the flip-flop circuit to bit lines using Schottky diodes to protect against latch-up of the ECL cell; and the inversion of the transistors in the circuits to provide a buried emitter construction for alpha strike protection. In a preferred embodiment, the Schottky diode and the load devices, such as resistors or load transistors used to couple the cell to one of the word lines are made using polysilicon to facilitate construction of the cell, reduce the total number of contacts needed, and enhance the speed of the cell.

4654824, Mar 31, 1987

Dec 18, 1984

6/683078

Mammen Thomas - San Jose CA
Wen C. Ko - San Jose CA

Advanced Micro Devices, Inc. - Sunnyvale CA

G11C 1140, G11C 1136

365175

An improved ECL bipolar memory cell is disclosed which comprises connecting the respective collectors of the memory transistors in the flip-flop circuit to bit lines using Schottky diodes to protect against latch-up of the ECL cell; and the inversion of the transistors in the circuits to provide a buried emitter construction for alpha strike protection. In a preferred embodiment, the Schottky diode and the load devices, such as resistors or load transistors used to couple the cell to one of the word lines are made using polysilicon to facilitate construction of the cell, reduce the total number of contacts needed, and enhance the speed of the cell.

4836861, Jun 6, 1989

Apr 11, 1988

7/174635

Douglas L. Peltzer - Cupertino CA
Richard L. Bechtel - Sunnyvale CA
Wen C. Ko - San Jose CA
William T. Liggett - Hollister CA

Tactical Fabs, Inc. - San Jose CA

H01L 3106, H01L 3118

136246

A point contact solar cell structure and method of manufacturing which provides metal contact from positive and negative bus bars to alternating n-wells and p-wells in a solar cell crystal. The solar cell spans two side-by-side metal bus bars. On the bottom surface of the cell crystal two side-by-side perforated metal layers contact wells of only one conductivity type. Holes in the perforated metal layers are located beneath wells of the opposite conductivity type. An insulated junction between the two perforated metal layers is located directly above the junction between the two side-by-side metal bus bars. Fingers from the perforated metal layer above one bus bar reach across and down to contact the opposite bus bar. Metal lines also reach from the bus bars up through the holes in the perforated contact layers and contact wells within the crystal. This way, all n-wells and p-wells have electrical contact to their respective bus bars.