WEI DONG
Acupuncture at San Jacinto Pl, Plano, TX
License number
Texas AC01324
Category
Acupuncture
Type
Acupuncturist
Address
Address
7712 San Jacinto Pl, Plano, TX 75024
Phone
(972) 669-1212
(469) 619-5024
(469) 619-5024
Personal information
See more information about WEI DONG at radaris.comName
Address
Phone
4720 Appleridge Dr, Richardson, TX 75082
3307 Ridgepoint Ct, Pearland, TX 77584
3307 Ridgepoint Ct, Pearland, TX 77584
2400 Waterview Pl, Richardson, TX 75080
4127 Peace Dr, Frisco, TX 75034
Professional information
See more information about WEI DONG at trustoria.com
Wei Dong - Plano, TX
Wei Dong - Plano, TX
Work:
TEKTRONIX COMMUNICATIONS
Principal Strategist TEKTRONIX COMMUNICATIONS TEKTRONIX COMMUNICATIONS
Senior Product Line Manager TEKTRONIX COMMUNICATIONS
Senior Manager, Iris Software Development Tier1 MNOs worldwide
Certified as SCRUM Master and Product Owner by SCRUM Alliance Architecture
Senior Manager Various Management and Engineering Positions
Principal Strategist TEKTRONIX COMMUNICATIONS TEKTRONIX COMMUNICATIONS
Senior Product Line Manager TEKTRONIX COMMUNICATIONS
Senior Manager, Iris Software Development Tier1 MNOs worldwide
Certified as SCRUM Master and Product Owner by SCRUM Alliance Architecture
Senior Manager Various Management and Engineering Positions
Education:
University of Texas at Dallas - Dallas, TX
M.S. in Computer Science University of Texas Southwestern Medical Center at Dallas
M.S. in Molecular Genetics Tsinghua University
B.S. in Computer Science and B.S Biological Sciences and Biotechnologies
M.S. in Computer Science University of Texas Southwestern Medical Center at Dallas
M.S. in Molecular Genetics Tsinghua University
B.S. in Computer Science and B.S Biological Sciences and Biotechnologies
Wei Dong, Plano TX
Wei Dong, Plano TX
Specialties:
Acupuncturist
Address:
7712 San Jacinto Pl, Plano, TX 75024
Potential And Rate Adjust Header Switch Circuitry Reducing Transient Current
Potential And Rate Adjust Header Switch Circuitry Reducing Transient Current
US Patent:
7570100, Aug 4, 2009
Filed:
Aug 16, 2004
Appl. No.:
10/918869
Inventors:
Wei Dong - Plano TX, US
Hiep Tran - Dallas TX, US
Hugh T. Mair - Fairview TX, US
Uming Ko - Plano TX, US
Hiep Tran - Dallas TX, US
Hugh T. Mair - Fairview TX, US
Uming Ko - Plano TX, US
Assignee:
Texas Instruments Incorporated - Dallas TX
International Classification:
H03K 17/687
US Classification:
327427, 327544
Abstract:
System and method for providing power to circuitry while avoiding a large transient current. A preferred embodiment comprises a distributed switch (such as switch arrangement ) with a plurality of switches (such as switch ) coupling a power supply to the circuitry. Each switch is individually controlled by a control signal and is turned on sequentially. Also coupled to each switch is a pre-driver circuit (such as pre-driver circuit ). The pre-driver circuit comprises a potential adjust circuit (such as potential adjust circuit ) that rapidly adjusts a voltage potential at the switch and a rate adjust circuit (such as the rate adjust circuit ) that accelerates the power ramp-up across the switch once transient currents are no longer a concern. Adjusting the voltage potential so that the switch operates in a saturation mode increases an effective capacitance across the switch and thereby retarding the power ramp-up across the switch.
Circuit And Method For Turn-On Of An Internal Voltage Rail
Circuit And Method For Turn-On Of An Internal Voltage Rail
US Patent:
2005020, Sep 22, 2005
Filed:
Mar 17, 2004
Appl. No.:
10/803581
Inventors:
Andrew Marshall - Dallas TX, US
Wei Dong - Plano TX, US
Wei Dong - Plano TX, US
International Classification:
H03K017/16
US Classification:
327427000
Abstract:
The circuit and method for turning on an internal voltage rail includes: coupling a first transistor between a power supply node and an internal voltage rail node; mirroring a current from a second transistor to the first transistor during a turn-on time period; and coupling a control node of the first transistor to a bias voltage node after the turn-on time period. This solution permits current controlled turn-on of the first transistor, but a fully switched-on first transistor once turn-on is complete.