VICTOR J TORRES
Electrician at North Plz, Austin, TX

License number
Texas 375825
Expiration Date
Aug 4, 2017
Category
Apprentice Electrician
Address
Address
8805 North Plz NORTH APT 1386, Austin, TX 78753
Phone
(512) 508-6894

Professional information

Victor Torres Photo 1

Chief Engineer At The Driskill Hotel

Position:
Chief Engineer at The Driskill Hotel
Location:
Austin, Texas Area
Industry:
Hospitality
Work:
The Driskill Hotel since Aug 2011 - Chief Engineer Driskill Hotel - 604 Brazos Street May 2006 - Aug 2011 - Assisant Chief Engineer
Education:
Capital City Trade & Technical 2004 - 2005


Victor Torres Photo 2

Victor Torres - Austin, TX

Work:
BILLMUNDAYSOUTH, TIME AUTO SALES
Sales Consultant in same organization
SOUTH POINT DODGE
sales consultant, intertnet adds.and sales, craighlist adds
Johnson - Buda, TX
Sales Consultant, intertnet adds.and sales, craighlist adds
MAXWELL FORD - Austin, TX
Sales Consultant, intertnet adds.and sales, craighlist adds
JUDSON-ADKINSON CAND - San Antonio, TX
SUPERVISOR
PEMEX GAS -STATION, MEXICO - San Miguel de Allende, Gto.
GEN. MANAGER, OWNER
FIERRO INDUSTRIALIZADO DEL NORTE - Ciudad Jurez, Chih.
GEN. MANAGER, OWNER
AMERICAN SMELTING AND REFINING CO - Mexico, MO
Mine compressor plant manager
Education:
University of Zacatecas
BACHELOR OF SIENCES
Skills:
Internet,words,excel,power point,finance contracts to sale cars customer.data inventory cars,edit pictures an specification car to send a craighlist,Metal Mechanic experience.Production and supervised manufacture plants,administration bussines,alls precision tools,pnewmatic an electric


Victor Torres Photo 3

Director Of Tennis At Jcc Of San Antonio

Position:
Director of Tennis at JCC of San Antonio
Location:
Austin, Texas Area
Industry:
Health, Wellness and Fitness
Work:
JCC of San Antonio - Director of Tennis


Victor Torres Photo 4

Semiconductor Device Having Multiple Overlapping Rows Of Bond Pads With Conductive Interconnects And Method Of Pad Placement

US Patent:
5962926, Oct 5, 1999
Filed:
Sep 30, 1997
Appl. No.:
8/940605
Inventors:
Victor Manuel Torres - Austin TX
Ashok Srikantappa - Austin TX
Laxminarayan Sharma - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 2348, H01L 2352, H01L 2940
US Classification:
257786
Abstract:
The present invention comprises a semiconductor device (20) having a active circuit (22) and a bond pad area (24). Within the bond pad area there are a plurality of rows of bond pads. Sets of bond pads (30-36) include one bond pad from each row. The bond pads (26) are uniquely positioned within the bond pad area (24) to allow for a first wire pitch between pads which are adjacent and in the same set, and a second wire pitch between pads which are adjacent and in different sets. A method of determining placement of the bond pads (26) is taught.


Victor Torres Photo 5

Semiconductor Package Bond Post Configuration

US Patent:
5898213, Apr 27, 1999
Filed:
Jul 7, 1997
Appl. No.:
8/888392
Inventors:
Victor Manuel Torres - Austin TX
Laxminarayan Sharma - Austin TX
Ashok Srikantappa - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 23495
US Classification:
257666
Abstract:
A bond post configuration for wire bonded semiconductors has bond posts grouped in three posts where two are arranged closely to a side of a die about a first axis and a third is arranged in between and further removed from the side about a second axis. In one form, the bond post configuration is a radial configuration. Additionally, conductive traces which extend from the bond posts and away from the die are placed off-center from the the bond posts about the first axis to provide more placement area for the bond posts arranged about the second axis. The bond post configuration may be utilized in any wire bonded semiconductor.


Victor Torres Photo 6

Leadframe Having Continuously Reducing Width And Semiconductor Device Including Such A Leadframe

US Patent:
5932924, Aug 3, 1999
Filed:
Feb 2, 1998
Appl. No.:
9/016988
Inventors:
Joseph B. Diana - Austin TX
Victor Manuel Torres - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
International Classification:
H01L 23495
US Classification:
257676
Abstract:
A leadframe (100) has a flag having an outer contour that tapers from first and second opposing ends (160, 162) to a common point, the midline (200) of the flag. The tapering of the leadframe is continuous, extending from points adjacent the first and second ends or from the ends themselves, to the common midline. According to this structure, a wide range of die sizes may be accommodated with a single leadframe, while simultaneously preventing popcorning of the packaged semiconductor device (300) incorporating the leadframe.