TUAN N NGUYEN, MD
Osteopathic Medicine at Jose Figueres Ave, San Jose, CA

7040970, May 9, 2006

Jul 15, 2004

10/892428

Simon McClatchie - Fremont CA, US
Sabir Majumder - Fremont CA, US
Ren Zhou - Fremont CA, US
Xuyen Pham - Fremont CA, US
Tuan A. Nguyen - San Jose CA, US

Lam Research Corporation - Fremont CA

B24B 1/00

451 60, 451285

An apparatus and method for evenly distributing a polishing fluid onto a polishing pad during a chemical mechanical planarization process, wherein the polishing fluid is dispersed by way of a spray being emitted from a spray nozzle. The pattern of polishing fluid applied to the polishing pad can be modified by adjustment of geometric parameters of the spray nozzle. The apparatus is configured with actuating mechanisms for translating and rotating the spray nozzle relative to the polishing pad in order to adjust a pattern of distribution of the polishing fluid. The method of dispersing polishing fluid onto the polishing pad produces an even distribution of polishing fluid across a width of the polishing pad.

7171434, Jan 30, 2007

Sep 9, 2002

10/238804

Rahim Ibrahim - Mountain View CA, US
Tuan Nguyen - San Jose CA, US
Ashish Shah - San Ramon CA, US
Ranjit Ghate - Oakland CA, US
Chan Ng - San Jose CA, US

Network Appliance, Inc. - Sunnyvale CA

G06F 17/30, G06F 7/00, G06F 12/00

707204, 707 1, 711100, 711162

A storage virtualization system for accessing at least one storage device for a virtual logical unit (VLUN) from at least one host. The system includes at least one upstream processing element (UPE) which is adapted for coupling to a corresponding host server. The system is further adapted for coupling to at least one storage device. The controller also includes a primary central processing element (CPE) that can be configurably coupled to the UPEs. The primary CPE permits data transfer to occur between a host and a storage device via the corresponding UPE. The controller further includes a backup CPE that can be configurably coupled to the UPEs. The backup CPE is configurable to permit the data transfer when the primary CPE becomes unavailable.

7167181, Jan 23, 2007

Jun 9, 2003

10/458493

Richard E. Hessel - Pleasanton CA, US
Vaughn T. Arnold - Scotts Valley CA, US
Jack Benkual - Cupertino CA, US
Joseph P. Bratt - San Jose CA, US
George Cuan - Sunnyvale CA, US
Stephen L. Dodgen - Boulder Creek CA, US
Emerson S. Fang - Fremont CA, US
Zhaoyu Gong - Cupertino CA, US
Thomas Y. Ho - Fremont CA, US
Hengwei Hsu - Fremont CA, US
Sidong Li - San Jose CA, US
Sam Ng - Fremont CA, US
Matthew N. Papakipos - Menlo Park CA, US
Jason R. Redgrave - Mountain View CA, US
Sushma S. Trivedi - Sunnyvale CA, US
Nathan D. Tuck - San Diego CA, US
Shun Wai Go - Milpitas CA, US
Lindy Fung - Sunnyvale CA, US
Tuan D. Nguyen - San Jose CA, US
Joseph P. Grass - Menlo Park CA, US
Bo Hong - San Jose CA, US
Abraham Mammen - Pleasanton CA, US
Abbas Rashid - Fremont CA, US
Albert Suan-Wei Tsay - Fremont CA, US

Apple Computer, Inc. - Cupertino CA

G06T 1/20, G06T 15/40, G09G 5/00

345506, 345421, 345613, 345614

A deferred shading graphics pipeline processor and method are provided encompassing numerous substructures. Embodiments of the processor and method may include one or more of deferred shading, a tiled frame buffer, and multiple?stage hidden surface removal processing. In the deferred shading graphics pipeline, hidden surface removal is completed before pixel coloring is done. The pipeline processor comprises a command fetch and decode unit, a geometry unit, a mode extraction unit, a sort unit, a setup unit, a cull unit, a mode injection unit, a fragment unit, a texture unit, a Phong lighting unit, a pixel unit, and a backend unit.