TODD THOMAS BROOKS
Electrician at Arthur Stiles Rd, Austin, TX

5381112, Jan 10, 1995

Sep 22, 1993

8/124684

Mathew A. Rybicki - Austin TX
Todd L. Brooks - Austin TX

Motorola, Inc. - Schaumburg IL

H03F 345

330253

A fully differential line driver circuit (25) includes an input differential amplifier (26) and double-ended differential amplifiers (27, 28). A first output driver stage (29) includes a pair of series connected transistors (30, 31), and a second output driver stage includes a pair of series connected transistors (33, 34). The differential amplifiers (27, 28) provide bias and signals voltages to the gates of the series connected transistors (30, 31, 33, 34). The output stages (29, 32) provide differential output signals for driving a low impedance load. The clamping circuits (35-38) control overlap currents in the output stages (29, 32). Common-mode feedback is used to ensure a common-mode voltage of the differential output signals remains at a predetermined voltage to ensure maximum signal swing and thus, maximum efficiency.

5187448, Feb 16, 1993

Feb 3, 1992

7/829822

Todd L. Brooks - Austin TX
Mathew A. Rybicki - Austin TX

Motorola, Inc. - Schaumburg IL

H03F 345

330258

A differential amplifier (60,60') enhances common-mode stability by making two nodes (86,87) of a first stage low common-mode impedance nodes and thus shifting a common-mode dominant pole from the two nodes (86,87). The first stage includes an input portion (80,80') and a differential load (110,110'). The input portion (80,80') provides first and second currents respectively to the differential load (110,110') in response to a differential input voltage. The first and second currents have a differential component and a common-mode component. The differential load (110,110') converts the differential and common-mode components of the first and second currents into differential and common-mode voltages, respectively, and provides a high impedance to the differential component and a low impedance to the common-mode component.

5283580, Feb 1, 1994

Sep 28, 1992

7/951958

Todd L. Brooks - Austin TX
Mathew A. Rybicki - Austin TX
H. Spence Jackson - Austin TX

Motorola, Inc. - Schaumburg IL

H03M 168

341145

A digital-to-analog converter (10) uses series-connected resistors (55-59) to implement conversion of most significant bits of a digital input signal to an equivalent analog output signal. Current sources (22-26) are used to implement conversion of least significant bits of the digital input signal to the analog output signal. After making a binary-to-thermometer code conversion of the least significant bits, first logic circuitry (70) provides control signals (SI) for controlling the switching of each of the current sources to either a first (42) or a second (44) node. After making a binary to `one of` code conversion of the most significant bits, second logic circuitry (86) provides control signals (SR) for respectively switching the first and second nodes to any two resistor nodes of the resistors. The resistors are connected between a reference voltage terminal and a third node where the analog output signal is developed.

5220288, Jun 15, 1993

Jun 1, 1992

7/891018

Todd L. Brooks - Austin TX

Motorola, Inc. - Schaumburg IL

H03F 345

330255

A continuous-time differential amplifier (52, 100) preserves fast settling time while reducing a relatively-high offset voltage-normally associated with a continuous-time differential amplifier using MOS load transistors. The differential amplifier (52, 100) includes a first transistor (81) biased as a current source to provide current into emitters of second (82) and third (83) emitter-coupled input transistors. Fourth (84) and fifth (85) load transistors are respectively coupled between collectors of the second (82) and third (83) input transistors and a power supply voltage terminal. An amplifier (70) having a positive input terminal coupled to the collector of the second input transistor (82) and a negative input terminal receiving a bias voltage biases the control electrodes of the load transistors (84, 85). The amplifier (70) increases the effective transconductance of the load transistors (84, 85) to allow larger control electrode areas, which reduces the effect of transistor mismatch.

5359296, Oct 25, 1994

Sep 10, 1993

8/119940

Todd L. Brooks - Austin TX
Mathew A. Rybicki - Austin TX

Motorola Inc. - Schaumburg IL

H03F 316

330288

A self-biased cascode current mirror includes a current mirror (60), and a cascode bias generator (50). The cascode bias generator (50) includes a resistor (51) to provide a bias voltage for the current mirror (60). The current mirror (60) includes cascode transistor (64) and two mirror transistors (62, 63). The bias voltage is approximately equal to a minimum saturation voltage of the cascode transistor (64) plus a gate-source voltage of the transistor (63) of the current mirror (60). The self-biased cascode current mirror (60) has a high output impedance and high voltage swing while providing low power consumption and requiring a small layout area.

5365199, Nov 15, 1994

Aug 2, 1993

8/100789

Todd L. Brooks - Austin TX

Motorola, Inc. - Schaumburg IL

H03F 138

330291

A class A amplifier (20) includes an amplifier (21), a capacitor (22), and an output stage (23). The output stage (23) includes a source-follower transistor (24) and a feedback circuit (25). The source-follower transistor (24) receives an analog signal from the amplifier (21) and provides a corresponding output signal to a load. The feedback circuit (25) provides current feedback to maintain a relatively constant drain current in the source-follower transistor (24). The class A amplifier (20) with the feedback circuit (25) provides high current drive capability with low quiescent power consumption, high power supply rejection, high voltage gain, and stable operation without the use of a Miller compensation capacitor.