THOMAS C BROWN
Electrician at Westcreek Dr, Austin, TX

License number
Texas 283971
Expiration Date
May 6, 2017
Category
Journeyman Electrician
Address
Address
6010 Westcreek Dr APT A, Austin, TX 78749
Phone
(734) 883-8360

Professional information

Thomas Brown Photo 1

Managing Member/Partner At Silicon Hills Wealth Management

Position:
Managing Member/Partner at Silicon Hills Wealth Management, Managing Partner at Weymouth Capital, Ltd
Location:
Austin, Texas Area
Industry:
Financial Services
Work:
Silicon Hills Wealth Management - Austin, Texas Area since Apr 2013 - Managing Member/Partner Weymouth Capital, Ltd since Jul 2005 - Managing Partner Austin National Financial Services Apr 2010 - Mar 2013 - Partner iPath Solutions Jan 1998 - Jun 2005 - Founder & Managing Partner Fillmore Consulting Group, LLC Mar 1994 - Dec 1997 - Co-Founder & Partner DocuQuest Technologies Jun 1991 - Feb 1994 - Founder & CEO Ameriscribe, Inc Aug 1983 - May 1991 - General Manager - Arizona Region
Education:
Bucknell University 1979 - 1983
B.S., Mechanical Engineering
Skills:
Business Analysis, Strategic Planning, Asset Management, Financial Planning, Application Architecture


Thomas Brown Photo 2

Thomas Brown, Austin TX

Specialties:
REO / Bank Owned, Short sales, Residential sales, Luxury homes, First time home buyers, Distressed properties, Relocation, TIC
Work:
Realty Stake LLC
Austin
(512) 865-5067
License #625272
Client type:
Home Buyers, Home Sellers
Property type:
Single Family Home, Condo/Townhome, Multi-family, TIC
Languages:
English
Skills:
Unparallel negotiating, maximize my clients’ investment.
About:
Thomas Brown works with Realty Stake LLC, a small boutique Residential Real Estate Brokerage in Austin Texas. With nearly 15 years of Real Estate and Mortgage Banking experience Thomas understands the buying and selling process. Thomas has always been heavily involved in all aspects of real estate. Brown has renovated and sold numerous homes with an excellent record of success. Thomas has also managed and owned his own rental portfolio.<br /><br />With his well-rounded experience in all areas of the industry, Thomas prides himself on bringing a more consultative approach for buyers and sellers. Thomas has combined his dedication and experience to making a giant footprint in the Austin residential real estate market. His strong business acumen allows Thomas to build and maintain lifelong relationships which explain why his business is achieving tremendous growth.<br /><br />Understanding your home is most likely your largest investment, Thomas believes you should be represented by a partner – a professional! His consultative approach to helping you buy or sell your home is centered on maximizing your investment.
Links:
Site


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Thomas C Brown, Austin TX

Specialties:
Surgeon
Address:
12221 N Mo Pac Expy, Austin, TX 78758
Education:
Doctor of Medicine
Board certifications:
American Board of Surgery Certification in Surgery


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Environmental Services Professional

Location:
Austin, Texas Area
Industry:
Environmental Services


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Thomas Brown - Austin, TX

Education:
The Unviversity of Texas at Austin -The McCombs School of Business - Austin, TX
Masters in Business Administration in Management
The University of Texas at Austin, Lillas School of Latin American Studies - Austin, TX
MA in Latin American Studies
Keene State College - Keene, NH
BS in MIS and Spanish Communications
Skills:
Human Resources, employee recruitement and retention, Affirmation Action and EEO reporting, Bilingual Spanish/English, Training experience, management, employee relations, government contract management and compliance


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Thomas Brown

Specialties:
Science
Work:
Austin Community College


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Semiconductor Device And Process For Generating An Etch Pattern

US Patent:
6613688, Sep 2, 2003
Filed:
Apr 26, 2002
Appl. No.:
10/133061
Inventors:
Thomas M. Brown - Austin TX
Edward O. Travis - Austin TX
Jeffrey C. Haines - Austin TX
Assignee:
Motorola, Inc. - Schaumburg IL
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 21302
US Classification:
438710, 451 41, 438692
Abstract:
A model-based approach for generating an etch pattern to decrease topographical uniformity involves placing reverse dummy features ( ) in a region of a semiconductor substrate ( ) according to the topography of the region and adjacent regions. The reverse dummy features are placed inconsistently over the semiconductor substrate ( ) because the need for reverse dummy features is inconsistent and varies from design to design. In one embodiment, the reverse dummy features ( ) having varying widths are placed with varying spacing between them and are placed in different regions. The determination of location, size and spacing of the reverse dummy features ( ) is determined based upon the uniformity effect over the entire semiconductor die and may be used in conjunction with the placement of printed dummy features. After placing the reverse dummy features ( ), a planarization process may be performed to remove the reverse dummy features, which improves the planarization.


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Method For Determining The Efficiency Of A Planarization Process

US Patent:
6057068, May 2, 2000
Filed:
Dec 4, 1998
Appl. No.:
9/205483
Inventors:
Christopher H. Raeder - Austin TX
Thomas Brown - Austin TX
Peter A. Burke - Newark DE
Assignee:
Advanced Micro Devices, Inc. - Austin TX
International Classification:
G03F 900
US Classification:
430 30
Abstract:
A method for measuring the planarization efficiency of a planarization process and a device for use with the method are provided. The device may be a substrate having a set of isolated features, such as trenches or hills, with different widths. In the method, a removable layer of material is formed over the substrate. The substrate features form corresponding features in the removable layer with varying dimensions. A pre-planarization thickness of the removable layer of material is measured at each feature and at one or more of isolation areas. The removable layer of material is then planarized using a planarization process associated with one or more process parameters. A post-planarization thickness of the removable is measured at each feature and at one or more of the isolation regions. The planarization efficiency of the planarization process is then determined as a function of the dimensions of the substrate features or corresponding features in the removable layers and/or one or more process parameters. The determined planarization efficiency may be output by, for example, generating a graph of the planarization efficiency or using the planarization efficiency to change one or more parameters of the planarization process.


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Method For Improving Planarity Of Shallow Trench Isolation Using Multiple Simultaneous Tiling Systems

US Patent:
6905967, Jun 14, 2005
Filed:
Mar 31, 2003
Appl. No.:
10/401400
Inventors:
Ruiqi Tian - Pflugerville TX, US
Thomas Michael Brown - Austin TX, US
Assignee:
AMD, Inc. - Sunnyvale CA
Motorola, Inc. - Shaumberg IL
International Classification:
H01L021/311
US Classification:
438697, 438626, 438691, 438692, 438129, 438424, 438631, 438645, 438599, 257752, 257750, 257620
Abstract:
In a feature layer of a semiconductor wafer, dummy tiles which overcome the tendency of dishing and erosion to occur during a CMP process are placed with various sizes and in various positions. An isolation zone is provided around active features. A scanning process of the feature layout surveys oxide density and nitride density over the wafer layer outside of said isolation zone. Values of the ratios of oxide/nitride density for two or more length scales which define tiling zones, are calculated. Tile placement and sizing in the zones is dependent upon the oxide/nitride density ratio values; and further upon an oxide deposition model specific to the oxide used in the fabrication process and upon a polishing model of the CMP process being employed.


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Chemical Mechanical Polish Platen And Method Of Use

US Patent:
6056631, May 2, 2000
Filed:
Oct 9, 1997
Appl. No.:
8/947600
Inventors:
Thomas M. Brown - Austin TX
Peter Austin Burke - Austin TX
Assignee:
Advanced Micro Devices, Inc. - Austin TX
International Classification:
B24B 722
US Classification:
451288
Abstract:
The present disclosure relates to a chemical mechanical polishing apparatus used for polishing wafers. The apparatus includes a polish platen and structure for separating the platen into at least first and second zones such that polishing fluid used in the first zone is prevented from entering the second zone.