TERENCE MICHAEL CLIFTON
Nursing at The Alameda, San Jose, CA

License number
California VN 263311
Category
Nursing
Type
Licensed Vocational Nurse
Address
Address 2
2001 The Alameda, San Jose, CA 95126
2555 Homestead Rd APT 48, Santa Clara, CA 95051
Phone
(408) 261-7777
(408) 259-2273 (Fax)
(408) 202-5075

Personal information

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Name
Address
Phone
Terence Clifton
1533 Alta Glen Dr APT 22, San Jose, CA 95125
Terence M Clifton, age 62
97 Woodside Dr, San Anselmo, CA 94960
(415) 451-8019

Professional information

Terence Clifton Photo 1

Method And Apparatus For Determining Critical Timing Path Sensitivities Of Macros In A Semiconductor Device

US Patent:
6889369, May 3, 2005
Filed:
Jul 26, 2001
Appl. No.:
09/915792
Inventors:
Terence M. Clifton - Santa Clara CA, US
Spencer A. Petersen - Austin TX, US
Assignee:
Advanced Micro Devices, Inc. - Austin TX
International Classification:
G06F017/50, G06F009/45
US Classification:
716 6, 716 4
Abstract:
A method for determining critical timing path sensitivities of macros in a semiconductor device includes configuring a timing parameter of a particular macro in the semiconductor device; determining a first maximum operating frequency of the semiconductor device configured in accordance with the timing parameter; changing the timing parameter of the particular macro; determining a second maximum operating frequency of the semiconductor device configured in accordance with the changed timing parameter; and determining a contribution of the selected macro to a critical timing path of the semiconductor device based on the first and second maximum operating frequencies. A system for testing a semiconductor device having a plurality of macros includes a tester and a controller. The tester is adapted to configure a timing parameter of a particular macro in the semiconductor device, determine a first maximum operating frequency of the semiconductor device configured in accordance with the timing parameter, change the timing parameter of the particular macro, and determine a second maximum operating frequency of the semiconductor device configured in accordance with the changed timing parameter. The controller is adapted to receive the first and second maximum operating frequencies and determine a contribution of the selected macro to a critical timing path of the semiconductor device based on the first and second maximum operating frequencies.