TAM K TRAN
Electrician in San Jose, CA

6563742, May 13, 2003

Mar 4, 2002

10/090356

Peter W. Lee - Saratoga CA
Tam H. Tran - San Jose CA

Aplus Flash Technology, Inc. - San Jose CA

G11C 1600

36518529, 365 63, 36518522

A multiple time programmable (MTP) memory device is achieved. The device comprises, first, a memory cell array including a means of electrical erasability and electrical programmability. The memory cell array comprises, preferably, a Flash memory cell array. A package has an external pin configuration that conforms to the JEDEC standard for an EPROM device wherein an external, positive programming voltage (VPP) pin is provided. Finally, an external, negative erasing voltage (VNN) pin is provided. The VNN pin is, preferably, multiplexed with the chip enable bar (CEB) pin.

6515910, Feb 4, 2003

Feb 15, 2002

10/076826

Peter W. Lee - Saratoga CA
Hsing-Ya Tsao - San Jose CA
Tam Tran - San Jose CA
Fu-Chang Hsu - San Jose CA

Aplus Flash Technology Inc. - San Jose CA

G11C 1606

36518522, 36518529, 3651853, 36518509

A method to test the erase condition of memory cells in a memory array device is achieved. The method is further extended to methods to detect and correct under erase and over erase conditions. The erase condition of a section of the memory array device is altered to form an erased section and non-erased sections. The control gates of the memory cells in the non-erased sections are forced to a normal off-state voltage sufficient to turn off erased cells. The control gates of the memory cells in non-selected subsections of the erased section are forced to a guaranteed off-state voltage that will turn off erased cells including those that are over erased. The control gates of the memory cells in a selected subsection of the erased section are forced to a check voltage. Thereafter, the bitline current of the selected subsection of the erased section is measured to determine erase condition of the selected subsection of the erase section.

2009025, Oct 15, 2009

Apr 10, 2008

12/101141

Andrey Balmin - San Jose CA, US
Fatma Ozcan - San Jose CA, US
Tam Minh Tran - San Jose CA, US

International Business Machines Corporation - Armonk NY

G06F 7/06, G06F 17/30

707 4, 707E17005, 707E17017

An apparatus, system, and method are disclosed for optimization of XPath expressions in a database management system configured to accept XML queries. Operations of the method include receiving an XQuery representation and partitioning XPath expressions within the XQuery representation into a plurality of XPath expression clusters. The XPath expression clusters may comprise one or more XPath expressions and those in each cluster may operate on a common document. Furthermore, the XPath expressions in each cluster are hierarchically related to each other such that branch nodes of the cluster are executable independent of nodes in other XPath expression clusters. The method also defines merging the one or more XPath expressions into one or more expression trees for each XPath expression cluster. The method generates one or more query execution plans from the one or more XPath expression blocks. The method includes, for each query execution plan, splitting each of the XPath expression blocks into one or more ordered fragments. The method determines a cardinality according to database statistics and an execution cost for each XPath expression block within each query execution plan. Finally, the method determines an aggregate cardinality for each query execution plan and an aggregate execution cost for each query execution plan. Therefore, an XQuery may be optimized at both the global XQuery and local XPath expression block level, improving performance and reducing overhead.

2007002, Feb 1, 2007

Jul 28, 2005

11/190947

Marcel Kutsch - Koeln, DE
Volker Markl - San Jose CA, US
Nimrod Megiddo - Palo Alto CA, US
Tam Minh Tran - San Jose CA, US

G06F 17/30

707002000

A method for consistent selectivity estimation based on the principle of maximum entropy (ME) is provided. The method efficiently exploits all available information and avoids the bias problem. In the absence of detailed knowledge, the ME approach reduces to standard uniformity and independence assumptions. The disclosed method, based on the principle of ME, is used to improve the optimizer's cardinality estimates by orders of magnitude, resulting in better plan quality and significantly reduced query execution times.

2007023, Oct 4, 2007

Apr 3, 2006

11/278532

Vincent Corvinelli - Mississauga, CA
Yuri Deigin - Richmond Hill, CA
John Hornibrook - Markham, CA
Tam Tran - San Jose CA, US

G06F 17/30

707001000

A method and system for estimating cardinalities for a plurality of columns in a database system is disclosed. The method and system include obtaining statistics collected for the plurality of columns. A first portion of the statistics indicates at least one relationship between at least a portion of the plurality of columns, while a second portion of the statistics includes single column statistics. The method and system also include utilizing the first portion and the second portion of the statistics to estimate the cardinality for the plurality of columns.

6943617, Sep 13, 2005

Dec 29, 2003

10/748540

Hieu Van Tran - San Jose CA, US
Tam Huu Tran - San Jose CA, US
Vishal Sarin - Santa Clara CA, US
Anh Ly - San Jose CA, US
Niang Hangzo - San Jose CA, US
Sang Thanh Nguyen - Union City CA, US

Silicon Storage Technology, Inc. - Sunnyvale CA

G05F001/10

327539

A bandgap reference generator comprises a PMOS transistor and NMOS transistor in a pnp bipolar junction transistor connected in series in a first leg. The bandgap reference generator includes a second leg that includes a PMOS transistor, an NMOS transistor, a resistor and a pnp bipolar junction transistor. A bias circuit provides a bias to a mirror formed by the gates of the PMOS transistors to lower the operating voltage of the bandgap reference generator. A second biasing circuit may provide bias to the mirror formed of the NMOS transistors. A time-based and a DC bias-based start up circuitry and method is provided.