SUZANNE E IANNI
Broker in Natick, MA

License number
Massachusetts 9010931
Issued Date
Jan 20, 1995
Expiration Date
Dec 16, 2007
Type
Salesperson
Address
Address
Natick, MA 01760

Professional information

Suzanne Ianni Photo 1

System For Locating Failure Signals By Comparing Input Data With Stored Threshold Value And Storing Failure Addresses In Alternating Buffers

US Patent:
5185883, Feb 9, 1993
Filed:
Oct 26, 1990
Appl. No.:
7/603791
Inventors:
Suzanne G. Ianni - Natick MA
John R. Fierke - Southboro MA
Stephen A. Connors - Center Barnstead NH
Assignee:
Data Translation, Inc. - Marlboro MA
International Classification:
G06F 1564, G06F 305, G06F 700
US Classification:
395575
Abstract:
A data acquisition circuit for receiving an analog input signal having a magnitude representing light intensity detected by a sequentially accessed, linear array of photocells of a line scan camera and providing digital data signals for use by a computer, the circuit including an analog-to-digital converter to convert said analog input signal to a stream of digital intensity signals, an offset memory storing offset correction values for respective photocells, a gain memory storing gain correction values for respective photocells, an adder connected to add or subtract the digital intensity signal for a given photocell to the offset correction value for that photocell and provide an offset-corrected digital signal, a multiplier connected to multiply the offset-corrected digital signal for a given photocell times the gain correction value for that photocell to provide a calibrated digital signal. Also disclosed are: comparing, on a photocell-by-photocell (i. e. , pixel-by-pixel) basis, the value of the digital intensity signal for each photocell with a respective threshold value stored in a threshold memory; a processing circuit that determines when the intensity values for adjacent photocells in the linear array in the line scan camera have a change in value and stores identification of the photocell at which there was a change in value; and a data compressor that receives parallel multibit intensity signals and provides single bit signals based on the values of the parallel multibit signals and a serial-to-parallel converter that sequentially stores the single multibit signals and groups a plurality of them together into a compressed, parallel multibit signal.