SUSAN KIM, DDS
Dentist at Gate Blvd, Austin, TX
License number
Texas 17206
Category
Dentist
Type
General Practice
Address
Address
2
4534 W Gate Blvd SUITE 200, Austin, TX 78745
3701 Kirby Dr SUITE 550, Houston, TX 77098
3701 Kirby Dr SUITE 550, Houston, TX 77098
Phone
(512) 892-5988
(512) 892-4064 (Fax)
(512) 892-4064 (Fax)
Organization information
See more information about SUSAN KIM at bizstanding.comCastle Dental Center - Susan Kim DDS
4534 W Gate Blvd STE 200, Austin, TX 78745
Categories:
Dentists, Electronic Commerce
Site:
Phone:
(512) 892-5988 (Phone), (800) 867-6453 (Free)
Open Hours:
Sun: Closed
Professional information
Susan Kim
Location:
Austin, Texas Area
Industry:
Information Technology and Services
Independent Mechanical Or Industrial Engineering Professional
Location:
Austin, Texas Area
Industry:
Mechanical or Industrial Engineering
Freelance Writer At Freelance
Position:
Freelance writer at freelance
Location:
Austin, Texas Area
Industry:
Writing and Editing
Work:
freelance
-
Freelance writer
Dr. Susan Kim, Austin TX - DDS (Doctor of Dental Surgery)
Specialties:
Dentistry
Address:
4534 W Gate Blvd STE 200, Austin 78745
(512) 892-5988 (Phone), (512) 892-4064 (Fax)
(512) 892-5988 (Phone), (512) 892-4064 (Fax)
Languages:
English
Method Of Controlling Barrier Metal Polishing Processes Based Upon X-Ray Fluorescence Measurements
US Patent:
6629879, Oct 7, 2003
Filed:
May 8, 2001
Appl. No.:
09/851459
Inventors:
Susan Kim - Austin TX
Paul R. Besser - Sunnyvale CA
Paul R. Besser - Sunnyvale CA
Assignee:
Advanced Micro Devices, Inc. - Austin TX
International Classification:
B24B 100
US Classification:
451 57, 451 41, 451 6, 451 53, 438692, 438693
Abstract:
The present invention is directed to a method of controlling polishing processes based upon x-ray fluorescence measurements. In one illustrative embodiment, the method comprises providing a wafer comprised of a layer of insulating material having a barrier metal layer formed thereabove and a layer of copper formed above the barrier metal layer, performing a chemical mechanical polishing operation to remove the barrier metal layer, irradiating at least one area of the wafer with x-rays, and analyzing x-rays leaving the irradiated area to determine the presence of material comprising the barrier metal layer.
Method Of Controlling The Formation Of Metal Layers
US Patent:
6610181, Aug 26, 2003
Filed:
Apr 30, 2001
Appl. No.:
09/845952
Inventors:
Paul R. Besser - Sunnyvale CA
Paul L. King - Mountain View CA
Susan Kim - Austin TX
Paul L. King - Mountain View CA
Susan Kim - Austin TX
Assignee:
Advanced Micro Devices, Inc. - Austin TX
International Classification:
C23C 1434
US Classification:
20419213, 20419215, 427 9, 427585, 427576, 427404, 438197, 438199, 438283
Abstract:
The present invention is directed to a method of controlling the formation of metal layers. In one illustrative embodiment, the method comprises depositing a layer of metal above a structure, irradiating at least one area of the layer of metal, and analyzing an x-ray spectrum of x-rays leaving the irradiated area to determine a thickness of the layer of metal. In further embodiments of the present invention, a plurality of areas, and in some cases at least five areas, of the layer of metal are irradiated. The layer of metal may be comprised of, for example, titanium, cobalt, nickel, copper, tantalum, etc.
Susan Soonsung Kim, Austin TX
Specialties:
Dentist
Address:
4534 W Gate Blvd, Austin, TX 78745
Nitridation Process For Fabricating An Ono Floating-Gate Electrode In A Two-Bit Eeprom Device
US Patent:
6319775, Nov 20, 2001
Filed:
Oct 25, 1999
Appl. No.:
9/433037
Inventors:
Arvind Halliyal - Sunnyvale CA
Robert B. Ogle - San Jose CA
Susan G. Kim - Austin TX
Kenneth Au - Fremont CA
Robert B. Ogle - San Jose CA
Susan G. Kim - Austin TX
Kenneth Au - Fremont CA
Assignee:
Advanced Micro Devices, Inc. - Sunnyvale CA
International Classification:
H01L 218247
US Classification:
438261
Abstract:
A process for fabricating an ONO floating-gate electrode in a two-bit EEPROM device includes the formation of a nitrogenated top oxide layer. The process includes the sequential formation of a silicon nitride layer and a top oxide layer using an in-situ LPCVD or RTCVD deposition process in which the silicon nitride layer is not exposed to ambient atmosphere prior to the formation of the top oxide layer. After forming the top oxide layer, an annealing process is carried out to diffuse nitrogen into the top oxide layer. The formation of a nitrogenated top oxide layer provides an improved two-bit EEPROM memory device by reducing charge leakage in the ONO floating-gate electrode.