STEVEN DANIEL JOHNSON, MD
Radiology at Bellinger St, Eau Claire, WI
License number
Wisconsin 31941
Category
Radiology
Type
Surgery
Address
Address
1400 Bellinger St, Eau Claire, WI 54703
Phone
(715) 838-5222
Professional information
Steven D Johnson, Eau Claire WI
Specialties:
Radiologist
Address:
1400 Bellinger St, Eau Claire, WI 54703
Education:
University of North Texas Health Science Center (Fort Worth), Texas College of Osteopathic Medicine - Doctor of Osteopathy
William Beaumont Army Medical Center - Residency - Internal Medicine
William Beaumont Army Medical Center - Residency - Internal Medicine
Board certifications:
American Board of Internal Medicine Certification in Internal Medicine
Steven Daniel Johnson, Eau Claire WI
Specialties:
Surgeon
Address:
1400 Bellinger St, Eau Claire, WI 54703
Board certifications:
American Board of Surgery Certification in Surgery
Steven Johnson, Eau Claire WI
Specialties:
Surgery
Work:
Midelfort Clinic
1400 Bellinger St, Eau Claire, WI 54703 Luther Hospital
1221 Whipple St, Eau Claire, WI 54703
1400 Bellinger St, Eau Claire, WI 54703 Luther Hospital
1221 Whipple St, Eau Claire, WI 54703
Education:
University of Wisconsin at Madison (1986)
Vector Bit-Matrix Multiply Functional Unit
US Patent:
5170370, Dec 8, 1992
Filed:
Nov 21, 1990
Appl. No.:
7/616736
Inventors:
William Lee - Chippewa Falls WI
Gary J. Geissler - Chippewa Falls WI
Steven J. Johnson - Chippewa Falls WI
Alan J. Schiffleger - Chippewa Falls WI
Gary J. Geissler - Chippewa Falls WI
Steven J. Johnson - Chippewa Falls WI
Alan J. Schiffleger - Chippewa Falls WI
Assignee:
Cray Research, Inc. - Eagan MN
International Classification:
G06F 752
US Classification:
364736
Abstract:
A method and apparatus provides bit manipulation of data in vector registers of a vector register computer system. Matrix multiplication is accomplished at a bit level of data stored as two matrices in a vector computer system to produce a matrix result. The matrices may be at least as large as 64 bits by 64 bits and multiplied by another 64 by 64 matrix by means of a vector matrix multiplication functional unit operating on the matrices within a vector processor. The resulting data is also stored at a 64 bit by 64 bit matrix residing in a resultant vector register.