DR. STEVEN ALAN SMITH, M.D.
Medical Practice at Emerald St, Boise, ID

License number
Idaho M-10631
Category
Medical Practice
Type
Adolescent Medicine
Address
Address
6348 W Emerald St, Boise, ID 83704
Phone
(208) 377-4400
(208) 377-4416 (Fax)

Personal information

See more information about STEVEN ALAN SMITH at radaris.com
Name
Address
Phone
Steven J Smith, age 71
6843 William Creek Rd, Thatcher, ID 83283
(208) 427-6202
Steven J Smith
3764 Presidential Dr, Meridian, ID 83642
(208) 855-5099
Steven J Smith, age 62
1718 3000, Wendell, ID 83355
(208) 536-2365
Steven J Smith, age 62
1704 3000, Wendell, ID 83355
(208) 536-4624
Steven J Smith, age 71
1166 University Ave, Blackfoot, ID 83221
(208) 785-5567

Professional information

Steven Alan Smith Photo 1

Steven Alan Smith, Boise ID

Specialties:
Pediatrics, Pediatric Adolescent Medicine
Work:
Primary Health Medical Group
6348 W Emerald St, Boise, ID 83704
Education:
University of California at Irvine (2006)


Steven Smith Photo 2

Bow Resistant Plastic Semiconductor Package And Method Of Fabrication

US Patent:
6384487, May 7, 2002
Filed:
Dec 6, 1999
Appl. No.:
09/454503
Inventors:
Steven R. Smith - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2348
US Classification:
257790, 257787, 257666, 257783, 257781, 257784
Abstract:
A bow resistant semiconductor package includes a semiconductor die, a leadframe and a plastic body. The plastic body includes a molded inner member encapsulating the die, and a molded outer member encapsulating the molded inner member. The inner member rigidities the package, and is dimensioned such that the outer member has substantially equal volumes of molding compound on either side of the leadframe. The equal volumes of molding compound reduce thermo-mechanical stresses generated during cooling of the molding compound, and reduce package bow. With reduced package bow, a planarity of the terminal leads on the package is maintained. Also, stresses on bonded connections between the terminal leads and electrodes on a supporting substrate, such as a printed circuit board or multi chip module substrate are reduced. In an alternate embodiment, the package includes volume equalizing members formed on the leadframe configured to equalize the volumes of molding compound on upper and lower segments of the package body.


Steven Smith Photo 3

Electronic Assemblies Containing Bow Resistant Semiconductor Packages

US Patent:
6700210, Mar 2, 2004
Filed:
Aug 2, 2002
Appl. No.:
10/210926
Inventors:
Steven R. Smith - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2329
US Classification:
257790, 257787, 257666, 257783, 257781, 257784
Abstract:
A bow resistant semiconductor package includes a semiconductor die, a leadframe and a plastic body. The plastic body includes a molded inner member encapsulating the die, and a molded outer member encapsulating the molded inner member. The inner member rigidities the package, and is dimensioned such that the outer member has substantially equal volumes of molding compound on either side of the leadframe. The equal volumes of molding compound reduce thermo-mechanical stresses generated during cooling of the molding compound, and reduce package bow. With reduced package bow, a planarity of the terminal leads on the package is maintained. Also, stresses on bonded connections between the terminal leads and electrodes on a supporting substrate, such as a printed circuit board or multi chip module substrate are reduced. In an alternate embodiment, the package includes volume equalizing members formed on the leadframe configured to equalize the volumes of molding compound on upper and lower segments of the package body.


Steven Smith Photo 4

Bow Resistant Plastic Semiconductor Package And Method Of Fabrication

US Patent:
6440772, Aug 27, 2002
Filed:
Apr 25, 2001
Appl. No.:
09/841221
Inventors:
Steven R. Smith - Boise ID
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L 2144
US Classification:
438106, 438111, 438112, 438123, 438124, 438127
Abstract:
A bow resistant semiconductor package includes a semiconductor die, a leadframe and a plastic body. The plastic body includes a molded inner member encapsulating the die, and a molded outer member encapsulating the molded inner member. The inner member rigidities the package, and is dimensioned such that the outer member has substantially equal volumes of molding compound on either side of the leadframe. The equal volumes of molding compound reduce thermo-mechanical stresses generated during cooling of the molding compound, and reduce package bow. With reduced package bow, a planarity of the terminal leads on the package is maintained. Also, stresses on bonded connections between the terminal leads and electrodes on a supporting substrate, such as a printed circuit board or multi chip module substrate are reduced. In an alternate embodiment, the package includes volume equalizing members formed on the leadframe configured to equalize the volumes of molding compound on upper and lower segments of the package body.


Steven Smith Photo 5

Semiconductor Package Having Polymer Members Configured To Provide Selected Package Characteristics

US Patent:
6943457, Sep 13, 2005
Filed:
Sep 15, 2003
Appl. No.:
10/662698
Inventors:
Steven R. Smith - Boise ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H01L023/29
US Classification:
257790, 257666, 257784
Abstract:
A bow resistant semiconductor package includes a semiconductor die, a leadframe and a plastic body. The plastic body includes a molded inner member encapsulating the die, and a molded outer member encapsulating the molded inner member. The inner member rigidities the package, and is dimensioned such that the outer member has substantially equal volumes of molding compound on either side of the leadframe. The equal volumes of molding compound reduce thermo-mechanical stresses generated during cooling of the molding compound, and reduce package bow. With reduced package bow, a planarity of the terminal leads on the package is maintained. Also, stresses on bonded connections between the terminal leads and electrodes on a supporting substrate, such as a printed circuit board or multi chip module substrate are reduced. In an alternate embodiment, the package includes volume equalizing members formed on the leadframe configured to equalize the volumes of molding compound on upper and lower segments of the package body.


Steven Smith Photo 6

Microelectronic Component Assemblies Having Lead Frames Adapted To Reduce Package Bow

US Patent:
7183485, Feb 27, 2007
Filed:
Mar 11, 2003
Appl. No.:
10/386757
Inventors:
Steven K. Groothuis - Rowlett TX, US
Steven R. Smith - Boise ID, US
Steve Baughman - Meridian ID, US
Bernard Ball - Kuna ID, US
T. Michael O'Connor - Kuna ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H05K 5/06
US Classification:
174 522, 174521, 174536, 257676, 257669
Abstract:
The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, the invention provides a microelectronic component assembly that includes spaced-apart first and second lead frame members. A packaged element is disposed between the lead frame members and attached thereto only by a plurality of elongate, flexible links that permit the packaged element to accommodate thermally induced stresses by floating with respect to the first and second lead frame members.


Steven Smith Photo 7

Microelectronic Component Assemblies Having Lead Frames Adapted To Reduce Package Bow

US Patent:
7601562, Oct 13, 2009
Filed:
Feb 7, 2007
Appl. No.:
11/672297
Inventors:
Steven K. Groothuis - Rowlett TX, US
Steven R. Smith - Boise ID, US
Steve Baughman - Meridian ID, US
Bernard Ball - Kuna ID, US
T. Michael O'Connor - Kuna ID, US
Assignee:
Micron Technology, Inc. - Boise ID
International Classification:
H05K 5/06
US Classification:
438111, 438123, 174536
Abstract:
The present disclosure suggests various microelectronic component assembly designs and methods for manufacturing microelectronic component assemblies. In one particular implementation, the invention provides a microelectronic component assembly that includes spaced-apart first and second lead frame members. A packaged element is disposed between the lead frame members and attached thereto only by a plurality of elongate, flexible links that permit the packaged element to accommodate thermally induced stresses by floating with respect to the first and second lead frame members.