Stephen W Laraway
Engineers in Layton, UT

License number
Utah 170885-2202
Issued Date
Mar 11, 1987
Expiration Date
Mar 31, 2017
Category
Engineer/Land Surveyor
Type
Professional Engineer
Address
Address
Layton, UT

Personal information

See more information about Stephen W Laraway at radaris.com
Name
Address
Phone
Stephen Laraway, age 43
1495 Wintergreen Cir, Layton, UT 84040
(801) 546-4159
Stephen Laraway, age 43
254 E Shadowbrook Ln, Kaysville, UT 84037
Stephen Laraway
Kaysville, UT
(801) 546-4159
Stephen W Laraway, age 69
1495 Wintergreen Cir, Layton, UT 84040
(801) 546-4159

Professional information

Stephen Laraway Photo 1

Detector And Method For Estimating Data Probability In A Multi-Channel Receiver

US Patent:
2006002, Feb 2, 2006
Filed:
Jul 7, 2005
Appl. No.:
11/177938
Inventors:
Haidong Zhu - Salt Lake City UT, US
Zhenning Shi - Braddon, AU
Stephen Laraway - Layton UT, US
International Classification:
H04J 1/16
US Classification:
370252000, 370338000
Abstract:
A detector and method for estimating channel data probability in a multi-user or multiple-input multiple-output communication system includes summing conditional bit probabilities conditioned on hypothetical channel data patterns over stochastically selected hypothetical channel data patterns. Various detailed hardware structures and circuits are also described.


Stephen Laraway Photo 2

Detector And Method For Estimating Data Probability In A Multi-Channel Receiver

US Patent:
7813438, Oct 12, 2010
Filed:
Sep 11, 2008
Appl. No.:
12/209143
Inventors:
Haidong Zhu - Salt Lake City UT, US
Zhenning Shi - Braddon, AU
Stephen Andrew Laraway - Layton UT, US
Assignee:
University of Utah Research Foundation - Salt Lake City UT
International Classification:
H04L 5/12
US Classification:
375262, 375136, 375144, 375147, 375148, 375340, 375341, 375346
Abstract:
A detector and method for estimating channel data probability in a multi-user or multiple-input multiple-output communication system includes summing conditional bit probabilities conditioned on hypothetical channel data patterns over stochastically selected hypothetical channel data patterns. Various detailed hardware structures and circuits are also described.