STEPHEN SCOTT STURGES
Pilots at Hartford St, Portland, OR

License number
Oregon A5234169
Issued Date
Mar 2015
Expiration Date
Mar 2017
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
12388 NW Hartford St, Portland, OR 97229

Personal information

See more information about STEPHEN SCOTT STURGES at radaris.com
Name
Address
Phone
Stephen Sturges, age 62
12388 NW Hartford St, Portland, OR 97229
(503) 720-6279
Stephen Sturges, age 72
28391 Southshore Dr, Umatilla, OR 97882

Professional information

Stephen Sturges Photo 1

Principal Engineer - Test Technology Development At Intel Corporation

Position:
Principal Engineer - Test Technology Development at Intel Corporation
Location:
Portland, Oregon Area
Industry:
Semiconductors
Work:
Intel Corporation - Principal Engineer - Test Technology Development
Languages:
Verilog


Stephen Sturges Photo 2

Non-Invasive, Low Cost Method And Apparatus For The Transmission, Display And Detection Of Internal Computer Status

US Patent:
2006001, Jan 26, 2006
Filed:
Jun 29, 2004
Appl. No.:
10/881093
Inventors:
Stephen Sturges - Portland OR, US
Brad Inman - Hillsboro OR, US
International Classification:
F21S 10/00
US Classification:
116202000
Abstract:
A method and apparatus for permitting diagnostics in a PC is described. Signals, imperceptible to a user, are transmitted through the LED used to indicate on/off power status. A small hand-held device may be used for detecting and interpreting the signals and to provide a visual indication to the user of a particular problem.


Stephen Sturges Photo 3

Low Cost Test For Ic's Or Electrical Modules Using Standard Reconfigurable Logic Devices

US Patent:
7412342, Aug 12, 2008
Filed:
Oct 28, 2004
Appl. No.:
10/975855
Inventors:
Stephen S. Sturges - Portland OR, US
Brad Inman - Hillsboro OR, US
Robert C. Hash - Hillsboro OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G01R 31/00, G01R 31/14
US Classification:
702117
Abstract:
Low cost test for Integrated Circuits or electrical modules using a reconfigurable logic device is described. In one embodiment, the invention includes configuring a reconfigurable logic device to comply with input standards of a device under test, applying test signals to the device under test, detecting output results of the device under test, and analyzing the detected output results.