SRINIVAS VENKATA PATTAMATTA
Pilots at Vitero Way, San Jose, CA
License number
California A4381057
Issued Date
Mar 2017
Expiration Date
Mar 2019
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
5818 Vitero Way, San Jose, CA 95138
Personal information
See more information about SRINIVAS VENKATA PATTAMATTA at radaris.comName
Address
Phone
5818 Vitero Way, San Jose, CA 95138
San Jose, CA
5493 Manderston Dr, San Jose, CA 95138
5818 Vitero Way, San Jose, CA 95138
10473 Johnson Ave, Cupertino, CA 95014
Professional information
Voltage Regulator Circuit
US Patent:
6380721, Apr 30, 2002
Filed:
Feb 14, 2001
Appl. No.:
09/783478
Inventors:
Srinivas Pattamatta - San Jose CA
Paul Ta - Fremont CA
Paul Ta - Fremont CA
Assignee:
Philips Electronics North America Corp - New York NY
International Classification:
G05F 140
US Classification:
323269, 323901, 323281
Abstract:
The performance of the main regulatory transistor of an on-chip voltage regulator circuit is enhanced when the main transistor is appropriately biased during start up. In an example embodiment, a voltage regulator circuit includes a thin gate oxide transistor as the main regulatory transistor and an operational amplifier that is referenced to a midlevel operating voltage. During start-up, the potential voltage difference is large enough to necessitate the disconnection of the main transistor from the operational amplifier. A voltage divider ladder circuit is used to maintain the gate voltage of the main transistor at the midlevel voltage while a smaller thick gate oxide transistor is used to maintain loop stability and to withstand voltage transients.
Voltage Regulator Circuit
US Patent:
6222353, Apr 24, 2001
Filed:
May 31, 2000
Appl. No.:
9/583325
Inventors:
Srinivas Pattamatta - San Jose CA
Paul Ta - Fremont CA
Paul Ta - Fremont CA
Assignee:
Philips Semiconductors, Inc. - Tarrytown NY
International Classification:
G05F 140
US Classification:
323269
Abstract:
The performance of the main regulatory transistor of an on-chip voltage regulator circuit is enhanced when the main transistor is appropriately biased during start up. In an example embodiment, a voltage regulator circuit includes a thin gate oxide transistor as the main regulatory transistor and an operational amplifier that is referenced to a midlevel operating voltage. During start-up, the potential voltage difference is large enough to necessitate the disconnection of the main transistor from the operational amplifier. A voltage divider ladder circuit is used to maintain the gate voltage of the main transistor at the midlevel voltage while a smaller thick gate oxide transistor is used to maintain loop stability and to withstand voltage transients.