Position:
Packaging Engineer at Texas Instruments
Work:
Texas Instruments
- Dallas, TX since Sep 2012
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Packaging Engineer
Georgia Tech Packaging Research Center
- Atlanta, GA Aug 2010 - Aug 2012
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Graduate Research Assistant- Interconnect Engineer
JP Morgan Chase
- 383 Madison Avenue, New York Jun 2011 - Aug 2011
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Corporate Development Program-Technology Intern (Business Analyst)
Eaton Electrical
- Greenwood, SC May 2009 - Aug 2009
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MVA/MVS Marking Intern
University of South Carolina- EE Department
- Columbia, SC 2008 - 2009
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Department Assistant
University of South Carolina- EE Department
- Columbia, SC May 2007 - Aug 2007
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REU (Research Experiences for Undergraduates) Student
Education:
Georgia Tech 2010 - 2012
Masters, Electrical and Computer Engineering
University of South Carolina-Columbia 2006 - 2010
Bachelors, Electrical Engineering