RONALD C. JENSEN, M.D.
Radiology at France Ave, Minneapolis, MN

8362607, Jan 29, 2013

Jun 3, 2009

12/455574

David Scheid - Eau Claire WI, US
Ronald James Jensen - Bloomington MN, US

Honeywell International Inc. - Morristown NJ

H01L 23/10, H01L 23/34

257707, 257704, 257706, 438122

An integrated circuit package includes a thermally and electrically conductive package lid. The package lid may be in electrical communication with an electrically conductive pad connected to a power plane, ground plane, or signal route in the integrated circuit. The electrically conductive package lid may provide an electrical connection for electrical power or electrical signals or may serve as an electrical ground. In some embodiments, the package lid may include a thermally and electrically conductive material. In other embodiments, the package lid may include an electrically insulative substrate coated on at least one surface with a layer of metal or another conductive material. The conductive layer may be electrically connected to electrical ground, a reference voltage, or a signal pay by at least one electrically conductive via.

7095226, Aug 22, 2006

Feb 27, 2004

10/789682

Hong Wan - Plymouth MN, US
Ronald J. Jensen - Bloomington MN, US
Michael J. Bohlinger - Minnetonka MN, US
Tamara K. Bratland - Plymouth MN, US

Honeywell International, Inc. - Morristown NJ

G01R 33/02, G01R 33/00

324247, 324260

Methods and apparatus for vertical chip-on-board sensor packages can comprise a vertical sensor circuit component comprising a first face, a second face, a bottom edge, a top edge, two side edges, input/output (I/O) pads and at least one sensitive direction wherein the I/O pads are arranged near the bottom edge. Such vertical die chip-on-board sensor packages can also comprise one or more horizontal sensor circuit components comprising a top face, a printed circuit board (PCB) mounting face, a vertical sensor circuit component interface edge, two or more other edges, and one or more sensitive directions wherein the vertical sensor circuit component interface edge supports the vertical sensor circuit component along the Z axis and conductively or non-conductively connects to the vertical sensor circuit component. The methods and apparatus provided include a multi-axis magnetometer for measuring the magnetic field intensity along three orthogonal axes comprising one or more magnetic field sensing circuit components mounted by their PCB mounting face to a PCB and a vertical magnetic sensor circuit component mounted to the PCB such that the vertical magnetic sensor circuit component is attached to and supported by the magnetic field sensing circuit component.

8354743, Jan 15, 2013

Jan 27, 2010

12/694898

Ronald James Jensen - Bloomington MN, US
David Scheid - Eau Claire WI, US

Honeywell International Inc. - Morristown NJ

H01L 23/02

257686, 257777, 257698

An integrated circuit package base includes a plurality of tiers. In some examples, an integrated circuit package encloses a plurality of stacked integrated circuits that are each electrically coupled to an electrical contact located on a respective tier of the package base. The tiers of the integrated circuit package can have different elevations relative to a bottom surface of the integrated circuit package.

6005778, Dec 21, 1999

Jul 29, 1996

8/681784

Richard K. Spielberger - Maple Grove MN
Ronald J. Jensen - Bloomington MN
Charles J. Speerschneider - Minnetonka MN

Honeywell Inc. - Minneapolis MN

H01L 2349, H05K 702

361770

Chip stacking and capacitor mounting arrangement including a planar spacer separating a first die and a second die. A conductive spacer provides for backside chip grounding in one application and provides for capacitor mounting in another application.

7868362, Jan 11, 2011

Oct 16, 2008

12/252452

Todd Andrew Randazzo - Mound MN, US
Ronald James Jensen - Bloomington MN, US
Thomas Keyser - Plymouth MN, US

Honeywell International Inc. - Morristown NJ

H01L 27/148

257226, 257E21122, 257233, 257292, 257778, 438 30, 438 48

A hypersensitive semiconductor die structure is disclosed, in which flip-chip packaging is used in conjunction with a modified SOI die in which a thick silicon support substrate has been removed to increase sensitivity of the sensing device. Rather than being located beneath layers of interconnects and dielectric, the disclosed structure places the sensing devices close to the surface, more closely exposed to the environment in which sensing is to occur. The structure also allows for the placement of sensing films on nearer to the sensing devices and/or an oxide layer overlying the sensing devices.

7863720, Jan 4, 2011

May 24, 2004

10/852378

Ronald J. Jensen - Bloomington MN, US
Richard K. Spielberger - Hanover MN, US

Honeywell International Inc. - Morristown NJ

H01L 23/02

257686, 257692, 257698, 257777, 257E25013, 438109

A method and system for stacking integrated circuits is described. An integrated circuit stack is formed by stacking integrated circuit pairs. The integrated circuit pairs are formed by connecting an active surface of a first integrated circuit to an active surface of a second integrated circuit using flip chip bonding. The first integrated circuit pair is connected to a substrate using an adhesive. The other integrated circuit pairs are stacked sequentially on the first integrated circuit pair using an adhesive. Wire bonding is used to connect the second integrated circuit in each of the integrated circuit pairs to the substrate.

5998867, Dec 7, 1999

Feb 23, 1996

8/606125

Ronald J. Jensen - Bloomington MN
Richard K. Spielberger - Maple Grove MN
Toan Dinh Nguyen - Brooklyn Park MN
William F. Jacobsen - Chattanooga TN

Honeywell Inc. - Minneapolis MN

H01L 2306, H01L 23552, H05K 900, H01B 718

257729

A shielding apparatus for an electronic component includes a first insulative encapsulant surrounding at least a portion of the component and a second encapsulant surrounding said first encapsulant and having conductive particles dispersed therein for absorbing ionizing radiation.

7965094, Jun 21, 2011

Jul 14, 2008

12/172317

Richard Spielberger - Maple Grove MN, US
Bruce Walker Ohme - Minneapolis MN, US
Ronald J. Jensen - Bloomington MN, US

Honeywell International Inc. - Morristown NJ

G01R 31/26, G01R 31/10

32476202, 32475007

A heater for heating packaged die for burn-in and heat testing is described. The heater may be a ceramic-type heater with a metal filament. The heater may be incorporated into the integrated circuit package as an additional ceramic layer of the package, or may be an external heater placed in contact with the package to heat the die. Many different types of integrated circuit packages may be accommodated. The method provides increased energy efficiency for heating the die while reducing temperature stresses on testing equipment. The method allows the use of multiple heaters to heat die to different temperatures. Faulty die may be heated to weaken die attach material to facilitate removal of the die. The heater filament or a separate temperature thermistor located in the package may be used to accurately measure die temperature.