Robert Thomas Croswell
Engineering at Northway Dr, Hanover Park, IL

6638872, Oct 28, 2003

Sep 26, 2002

10/255881

Robert Croswell - Hanover Park IL
Gregory Dunn - Arlington Heights IL

Motorola, Inc. - Schaumburg IL

H01L 21311

438695, 438689, 257 63, 257189

High quality epitaxial layers of monocrystalline materials can be grown overlying monocrystalline substrates such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. In addition, formation of a compliant substrate may include utilizing surfactant enhanced epitaxy and epitaxial growth of single crystal silicon onto single crystal oxide materials. Monocrystalline substrates having a hydrogen ion implant are cleaved along the hydrogen ion implant, and an insulating substrate is bonded to the monocrystalline oxide.

7423608, Sep 9, 2008

Dec 20, 2005

11/312286

Gregory J. Dunn - Arlington Heights IL, US
Robert T. Croswell - Hanover Park IL, US
George H. Kumpf - Hanover Park IL, US
John A. Svigelj - Crystal Lake IL, US

Motorola, Inc. - Schaumburg IL

H01Q 15/24

343909, 343700 MS, 343756, 343787

A high impedance surface () has a printed circuit board () with a first surface () and a second surface (), and a continuous electrically conductive plate () disposed on the second surface () of the printed circuit board (). A plurality of electrically conductive plates () is disposed on the first surface () of the printed circuit board (), while a plurality of elements are also provided. Each element comprises at least one of (1) at least one multi-layer inductor () electrically coupled between at least two of the electrically conductive plates () and embedded within the printed circuit board (), and (2) at least one capacitor () electrically coupled between at least two of the electrically conductive plates (). The capacitor () comprises at least one of (a) a dielectric material () disposed between adjacent electrically conductive plates, wherein the dielectric material () has a relative dielectric constant greater than 6, and (b) a mezzanine capacitor embedded within the printed circuit board ().

2004012, Jul 1, 2004

Dec 30, 2002

10/331693

Robert Croswell - Hanover Park IL, US
Jovica Savic - Downers Grove IL, US
Aroon Tungare - Winfield IL, US
Taeyun Kim - Cary NC, US
Angus Kingon - Cary NC, US
Jon-Paul Maria - Raleigh NC, US

B05D003/02, B05D005/12

427/079000, 427/376100

Thin film ceramic foil capacitors are mass-produced using inline reel-to-reel processing techniques by starting () with a length of copper foil which serves as one plate of the capacitor, then depositing () a layer of a ceramic precursor on a portion of one side of the copper foil at a first station. The foil is advanced () to the next station where the ceramic precursor and the copper foil are heated () to remove any carrier solvents or vehicles, then pyrolyzed () to remove any residual organic materials. It is then sintered () at high temperatures to convert the ceramic to polycrystalline ceramic. A final top metal layer is then deposited () on the polycrystalline ceramic to form the other plate of the capacitor. The entire process or portions of the process is performed in-line such that one or more of the steps are simultaneously performed on different portions of the foil at the same time, or such that, after any one step, the foil is advanced and the step repeated at a new location on the foil.

7528788, May 5, 2009

Jul 17, 2008

12/174960

Gregory J. Dunn - Arlington Heights IL, US
Robert T. Croswell - Hanover Park IL, US
George H. Kumpf - Hanover Park IL, US
John A. Svigelj - Crystal Lake IL, US

Motorola, Inc. - Schaumburg IL

H01Q 3/40

343795, 343700 MS, 343754, 343833

A high impedance surface () has a printed circuit board () with a first surface () and a second surface (), and a continuous electrically conductive plate () disposed on the second surface () of the printed circuit board (). A plurality of electrically conductive plates () is disposed on the first surface () of the printed circuit board (), while a plurality of elements are also provided. Each element comprises at least one of (1) at least one multi-layer inductor () electrically coupled between at least two of the electrically conductive plates () and embedded within the printed circuit board (), and (2) at least one capacitor () electrically coupled between at least two of the electrically conductive plates (). The capacitor () comprises at least one of (a) a dielectric material () disposed between adjacent electrically conductive plates, wherein the dielectric material () has a relative dielectric constant greater than 6, and (b) a mezzanine capacitor embedded within the printed circuit board ().

7193838, Mar 20, 2007

Dec 23, 2003

10/744695

Gregory J. Dunn - Arlington Heights IL, US
Remy J. Chilini - Crystal Lake IL, US
Robert T. Croswell - Hanover Park IL, US
Timothy B. Dean - Elk Grove IL, US
Claudia V. Gamboa - Chicago IL, US
Jovica Savic - Downers Grove IL, US

Motorola, Inc. - Schaumburg IL

H01G 4/30

3613011, 3613061, 3613063, 3613211, 361311, 361313

A dielectric circuit board foil () includes a conductive metal foil layer (), a crystallized dielectric oxide layer () disposed adjacent a first surface of the conductive metal foil layer, a lanthanum nickelate layer () disposed on the crystallized dielectric oxide layer, and an electrode layer () that is substantially made of one or more base metals disposed on the lanthanum nickelate layer. The foil () may be adhered to a printed circuit board sub-structure () and used to economically fabricate a plurality of embedded capacitors, including isolated capacitors of large capacitive density (>1000 pf/mm).

7138068, Nov 21, 2006

Mar 21, 2005

11/084938

Gregory J. Dunn - Arlington Heights IL, US
Robert T. Croswell - Hanover Park IL, US
Jaroslaw A. Magera - Palatine IL, US
Jovica Savic - Downers Grove IL, US
Aroon V. Tungare - Winfield IL, US

Motorola, Inc. - Schaumburg IL

H01L 21/302

216 83, 257773, 438381, 438778, 438793, 438794, 438791

A method is disclosed for fabricating a patterned embedded capacitance layer. The method includes fabricating () a ceramic oxide layer () overlying a conductive metal layer () overlying a printed circuit substrate (), perforating () the ceramic oxide layer within a region (), and removing () the ceramic oxide layer and the conductive metal layer in the region by chemical etching of the conductive metal layer. The ceramic oxide layer may be less than 1 micron thick.

7361568, Apr 22, 2008

Dec 21, 2005

11/316087

Gregory J. Dunn - Arlington Heights IL, US
Remy J. Chelini - Crystal Lake IL, US
Robert T. Croswell - Hanover Park IL, US
Philip M. Lessner - Newberry SC, US
Michael D. Prevallet - Mauldin SC, US
John D. Prymak - Greer SC, US

Motorola, Inc. - Schaumburg IL

H01L 21/20, H01L 29/00, H01L 23/48, H01G 4/005

438381, 438250, 257532, 257758, 257773, 257E21008, 361303

Embedded capacitors comprise a bimetal foil () that includes a first copper layer () and an aluminum layer () on the first copper layer. The aluminum layer has a smooth side adjacent the first copper layer and a high surface area textured side () opposite the first copper layer. The bimetal foil further includes an aluminum oxide layer () on the high surface area textured side of the aluminum layer, a conductive polymerlayer () on the aluminum oxide layer, and a second copper layer () overlying the aluminum oxide layer. The bimetal foil may be embedded in a circuit board () to form high value embedded capacitors.

7056800, Jun 6, 2006

Dec 15, 2003

10/736327

Robert T. Croswell - Hanover Park IL, US
Gregory J. Dunn - Arlington Heights IL, US
Robert B. Lempkowski - Elk Grove IL, US
Aroon V. Tungare - Winfield IL, US
Jovica Savic - Downers Grove IL, US

Motorola, Inc. - Schaumburg IL

H01L 21/20, H01G 4/00

438381, 3613011

One of a plurality of capacitors embedded in a printed circuit structure includes a first electrode () overlaying a first substrate layer () of the printed circuit structure, a crystallized dielectric oxide core () overlaying the first electrode, a second electrode () overlying the crystallized dielectric oxide core, and a high temperature anti-oxidant layer () disposed between and contacting the crystallized dielectric oxide core and at least one of the first and second electrodes. The crystallized dielectric oxide core has a thickness that is less than 1 micron and has a capacitance density greater than 1000 pF/mm. The material and thickness are the same for each of the plurality of capacitors. The crystallized dielectric oxide core may be isolated from crystallized dielectric oxide cores of all other capacitors of the plurality of capacitors.

6891190, May 10, 2005

May 23, 2002

10/154013

Ke Keryn Lian - Palatine IL, US
Robert T. Croswell - Hanover Park IL, US
Aroon Tungare - Winfield IL, US
Manes Eliacin - Buffalo Grove IL, US

Motorola, Inc. - Schaumburg IL

H01L029/76

257 40, 257310, 257642, 257759

An organic semiconductor device () can be embedded within a printed wiring board (). In various embodiments, the embedded device () can be accompanied by other organic semiconductor devices () and/or passive electrical components (). When so embedded, conductive vias () can be used to facilitate electrical connection to the embedded device. In various embodiments, specific categories of materials and/or processing steps are used to facilitate the making of organic semiconductors and/or passive electrical components, embedded or otherwise.

2004006, Apr 15, 2004

Oct 10, 2002

10/267692

Gregory Dunn - Arlington Heights IL, US
Robert Croswell - Hanover Park IL, US
Jeffrey Petsinger - Wayne IL, US

MOTOROLA, INC. - Schaumburg IL

H01L029/04

257/075000

High quality epitaxial layers of monocrystalline materials () can be grown overlying monocrystalline substrates () such as large silicon wafers by forming a compliant substrate for growing the monocrystalline layers. An accommodating buffer layer () comprises a layer of monocrystalline oxide spaced apart from a silicon wafer by an amorphous interface layer () of silicon oxide. The amorphous interface layer dissipates strain and permits the growth of a high quality monocrystalline oxide accommodating buffer layer. Any lattice mismatch between the accommodating buffer layer and the underlying silicon substrate is taken care of by the amorphous interface layer. Some preferred electronic devices are described that use a layer or pattern of a perovskite cuprate () such as YBaCuO(YBCO) or YPrBaCuO(YPBCO, 0