Robert R. Brooks
Electrician in Beaverton, OR

License number
Colorado 11617
Issued Date
Nov 19, 1993
Renew Date
Feb 28, 1997
Expiration Date
Feb 28, 1997
Type
Journeyman Electrician
Address
Address
4820 SW Greensboro Way 49 SW GREENSBORO WAY 49, Beaverton, OR 97007

Professional information

Robert Brooks Photo 1

Optimized Universal Card Slot System For Sonet Multiplex Equipment

US Patent:
5848065, Dec 8, 1998
Filed:
Jan 11, 1996
Appl. No.:
8/584193
Inventors:
Steven S. Gorshe - Beaverton OR
Robert W. Brooks - Aloha OR
Assignee:
NEC America, Inc. - Melville NY
International Classification:
H04J 302
US Classification:
370376
Abstract:
A universal tributary interface group approach for SONET multiplex equipment in which the shelf is partitioned into regions and each region can be provisioned to support different service types. The universal tributary group system includes an equipment shelf having a backplane. The equipment shelf is partitioned into regions called tributary groups which are each capable of accepting tributary units having compatible bus widths and clock rates. Removable card guides may be inserted into the tributary group spaces so that tributary interface units of different heights and widths may be placed in the tributary group spaces. Additionally, a plurality of bus segments run along the backplane to electrically connect a time slot interchange unit to card slots in the tributary groups. Each of the bus segments is capable of being provisioned to use a bus rate compatible with the data requirements of the tributary group it services.


Robert Brooks Photo 2

Flexible Sonet Access And Transmission Systems

US Patent:
6667973, Dec 23, 2003
Filed:
Mar 31, 1999
Appl. No.:
09/282405
Inventors:
Steven Scott Gorshe - Beaverton OR
Robert Wesley Brooks - Aloha OR
Assignee:
Zhone Technologies, Inc. - Oakland CA
International Classification:
H04L 1250
US Classification:
370376, 370907, 370451
Abstract:
A SONET network interface for interconnecting a high speed unit (HSU) with low speed interface units (LSUs) to enable transmission of signals therebetween. The interface including: a bus for interfacing the HSU with each of the LSU units to enable transmission of signals from each of LSUs to the HSU, and reception of the signals from the HSU to each of the LSUs; and a backplane connected to the bus and having at least two time slots for performing full time slot interchange between the at least two LSUs, wherein any of the at least two LSUs can read received data directly from one of the at least two time slots and can place its transmit data into any other of the at least two time slots for communication with another of the at least two LSUs without exchanging the received and/or transmit data with the at least one HSU. In other embodiments, the HSU, LSUs, and bus are contained in a main shelf and mixing means are provided for allowing STM and ATM services to be mixed in the main shelf or an expansion shelf is provided containing expansion LSUs and an expansion interface unit (ESI) connected to the HSU of the main shelf for exchanging data between the main shelf and the expansion shelf; wherein STM services are performed in either the main shelf or the expansion shelf and ATM services are performed in the other of the main shelf or the expansion shelf.


Robert Brooks Photo 3

Flexible Sonet Access And Transmission System

US Patent:
6768745, Jul 27, 2004
Filed:
Mar 31, 1999
Appl. No.:
09/282407
Inventors:
Steven Scott Gorshe - Beaverton OR
Robert Wesley Brooks - Aloha OR
Assignee:
Zhone Technologies, Inc. - Oakland CA
International Classification:
H04L 1228
US Classification:
370421, 370451, 370376, 370907, 398 58, 398 59
Abstract:
A SONET network interface for interconnecting at least one high speed unit (HSU) with at least two low speed interface units (LSUs) to enable transmission of signals therebetween. The interface having: a common bus of predetermined bit width for interfacing the HSU unit with each of the LSU units to enable transmission of signals from each of the LSUs to the HSU, and reception of the signals from the HSU to each of the LSUs; a first partition bus of the predetermined bit width for interfacing the HSU to a predetermined number of the LSUs, the first partition bus being partitioned into a first bus for interfacing the HSU to a first subset of the LSUs and a second bus for interfacing the HSU to a second subset of the LSUs; and a second partition bus of the predetermined bit width for interfacing the HSU to a predetermined number of the LSU units.


Robert Brooks Photo 4

Sonet System And Method Which Performs Tsi Functions On The Backplane And Uses Pcm Buses Partitioned Into 4-Bit Wide Parallel Buses

US Patent:
6580709, Jun 17, 2003
Filed:
Mar 31, 1999
Appl. No.:
09/282406
Inventors:
Steven Scott Gorshe - Beaverton OR
Robert Wesley Brooks - Aloha OR
Assignee:
NEC America, Inc. - Melville NY
International Classification:
H04L 1266
US Classification:
370352, 370376
Abstract:
A SONET network interface for interconnecting a high speed unit (HSU) with low speed interface units (LSUs) is provided for enabling transmission of signals therebetween. The interface includes: a bus for interfacing the HSU with each of the LSUs to enable transmission of signals from each of the LSUs to the HSU, and reception of the signals from the HSU to each of the LSUs, wherein the HSU, LSUs, and the bus are contained in a primary shelf. The network interface also has secondary shelves, each containing secondary LSUs and an intershelf ring interconnection (IRI) bus connecting the primary shelf and each of the secondary shelves in series for exchanging data between the HSU of the primary shelf and each of the secondary shelves. Wherein the IRI bus has full access to the bandwidth of each of the at least one secondary shelves and each series connection between shelves comprises a drop bus for transmitting data to the next shelf in the series and an add bus for receiving data from the next shelf in the series and accumulating the received data from each of the at least one secondary shelves for transmission through the series and to the primary shelf.


Robert Brooks Photo 5

Bus Rate Adaptation And Time Slot Assignment Circuit For A Sonet Multiplex System

US Patent:
5878039, Mar 2, 1999
Filed:
Apr 24, 1996
Appl. No.:
8/637413
Inventors:
Steven S. Gorshe - Beaverton OR
Robert W. Brooks - Aloha OR
Assignee:
NEC America, Inc. - Melville NY
International Classification:
H04J 322, H04Q 1104
US Classification:
370376
Abstract:
An interface device is provided which may be used to perform rate adaptation and time slot assignment, in either the transmit or receive directions, in a multiplexing unit for interfacing a high rate optical carrier line to a plurality of lower rate information carrier lines. The high rate optical carrier line may be a SONET or SDH carrier line. The interface device according to the present invention may be operationally configured to provide data rate adaptation and time slot assignment between an optical carrier line operating at an OC-12 rate with lower rate lines operating according to OC-3, OC-1, DS-3, or DS-1 protocols, or even virtual channels. A plurality of identical interface devices may be cascaded together and used to perform interface support for various channels operating at various rates, merely by manipulating the operational configuration of the individual interface devices in the cascade.