ROBERT LOUIS CHAO
Pilots at Harvard Ct, Los Altos, CA
License number
California A0316137
Issued Date
Apr 2016
Expiration Date
Apr 2018
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
14555 Harvard Ct, Los Altos, CA 94022
Professional information
Electrically Adjustable Cmos Integrated Voltage Reference Circuit
US Patent:
6414536, Jul 2, 2002
Filed:
Aug 4, 2000
Appl. No.:
09/632407
Inventors:
Robert L. Chao - Los Altos CA 94022
International Classification:
H03K 1772
US Classification:
327540, 327563
Abstract:
An improved voltage reference circuit relies on electrically adjustable analog devices fabricated on a common substrate. The circuit has two electrically adjustable matched transistor pairs. A first matched transistor pair includes an adjusting transistor and a differential pair transistor. A second matched transistor pair also includes an adjusting transistor and a differential pair transistor. Each of the matched transistor pairs share an insulated gate or electrically connected insulated gates. Geometrical and electrical matching occurs as between the two adjusting transistors and between the two differential pair transistors. The two differential pair transistors are electrically connected at the source terminals to form a differential circuit. A feedback loop, which includes an amplifier, a fixed resistor and a current source complete the circuit.
Integrated Electrically Adjustable Analog Transistor Device
US Patent:
5309009, May 3, 1994
Filed:
Sep 14, 1992
Appl. No.:
7/944546
Inventors:
Robert L. Chao - Los Altos CA
International Classification:
H01L 2702
US Classification:
257318
Abstract:
An analog MOS transistor device allows the user to set the threshold characteristics of the device. This transistor device is fabricated using conventional CMOS fabrication materials and methods. An insulated gate spans across a source junction, a drain junction, and a control junction. This gate can be charged or discharged to a desired voltage level by injecting or removing charge at the insulated gate. The insulated gate has no conductor connection, and is only capacitively coupled to the source junction, drain junction and control junction. The user sets the voltage on the insulated gate, then varies the voltage impressed on the control junction as the application requires. The user can set the channel conductivity characteristics of the device by setting the charge level on the insulated gate, and by varying the voltage on the control junction, both of which may be dynamically adjusted in-circuit.
Integrated Monolithic Operational Amplifier With Electrically Adjustable Input Offset Voltage
US Patent:
6066986, May 23, 2000
Filed:
Apr 29, 1998
Appl. No.:
9/069592
Inventors:
Robert L. Chao - Los Altos CA
International Classification:
H03F 345
US Classification:
330261
Abstract:
An integrated operational amplifier device has an operational amplifier device, and means connected to the operational amplifier device for providing at least one of a positive and a negative electrically adjustable input offset voltages. The system further comprises semiconductor device means for affecting the amount of input offset voltage supplied to the operational amplifier device. The system further comprises charge storage device means for storing a charge for maintaining a constant input offset voltage for controlling the operation of the semiconductor device means. The charge storage device means, the semiconductor device means, and the operational amplifier device are a monolithic integrated circuit.
Energy Efficient Voltage Detection Circuit And Method Therefor
US Patent:
2008019, Aug 21, 2008
Filed:
Feb 16, 2007
Appl. No.:
11/676121
Inventors:
Robert L. Chao - Los Altos CA, US
International Classification:
G05F 1/10
US Classification:
327541
Abstract:
A voltage detection circuit has a first MOSFET device having a drain, a gate, and a source terminal. A feedback element is coupled to the drain terminal and the gate terminal of the first MOSFET device. An input voltage is coupled to the gate terminal of the first MOSFET device. The voltage detection circuit is actively detecting a voltage from when the input voltage is in an OFF-state voltage region of the first MOSFET device. This detection continues through when the input voltage is at a sub-threshold voltage region of the first MOSFET, to when the input voltage exceeds the threshold voltage of the first MOSFET. This voltage detection circuit dissipates only a pre-selected drain-current at a level exceeding the drain-leakage current of the first MOSFET, as power dissipation.
Integrated Electrically Adjustable Analog Transistor Devices Having Multiple Device Sub-Structures And Methods Therefor
US Patent:
6091103, Jul 18, 2000
Filed:
Mar 5, 1998
Appl. No.:
9/035507
Inventors:
Robert L. Chao - Los Altos CA
International Classification:
H01L 2978, H01L 3300
US Classification:
257318
Abstract:
An improved integrated electrically adjustable analog transistor device is delineated wherein the device has multiple sub-structures to optimize performance of the device. One of the sub-structures is particularly well suited for charging the device's insulated gate. Additional sub-structures, each different in dimensions and electrical characteristics from the first sub-structure, are implemented for optimal use with an external electrical circuit.