MR. ROBERT BARNES
Social Work at Democracy Rd, Albuquerque, NM
License number
New Mexico 3440
Category
Social Work
Type
Addiction (Substance Use Disorder)
Address
Address
8613 Democracy Rd NE, Albuquerque, NM 87109
Phone
(505) 507-8679
Personal information
See more information about ROBERT BARNES at radaris.comName
Address
Phone
510 Deming Del Sol Dr, Deming, NM 88030
315 S Hudson St, Silver City, NM 88061
510 Deming Del Sol Dr #D1, Deming, NM 88030
Professional information
Sim Instructor Lockheed Martin
Position:
Simulator Contract Instructor at Lockheed Martin Corp.
Location:
Albuquerque, New Mexico
Industry:
Airlines/Aviation
Work:
Lockheed Martin Corp.
since Dec 2008
-
Simulator Contract Instructor
Retired Air Force
Apr 1984 - Oct 2007
-
Officer
USAF
1983 - 2007
-
Aviator
Education:
Embry Riddle Aeronautical University-Worldwide 2012 - 2013
MBAA, Business Administration in Aviation Embry Riddle Aeronautical University-Worldwide 2009 - 2012
MSPM, Project Management Embry-Riddle Aeronautical University 1991 - 1993
Masters, Aeronautical Science San Diego State University-California State University 1983 - 1985
BS, Urban & Transportation Geography
MBAA, Business Administration in Aviation Embry Riddle Aeronautical University-Worldwide 2009 - 2012
MSPM, Project Management Embry-Riddle Aeronautical University 1991 - 1993
Masters, Aeronautical Science San Diego State University-California State University 1983 - 1985
BS, Urban & Transportation Geography
Interests:
Golf, flying, computers, travel and swimming.
Dynamically Reconfigurable Systolic Array Accelorators
US Patent:
2011026, Oct 27, 2011
Filed:
Apr 22, 2011
Appl. No.:
13/092748
Inventors:
Aravind Dasu - Providence UT, US
Robert C. Barnes - Albuquerque NM, US
Robert C. Barnes - Albuquerque NM, US
Assignee:
UTAH STATE UNIVERSITY - North Logan UT
International Classification:
G06F 15/76, G06F 9/06
US Classification:
712 15, 712E09003
Abstract:
A polymorphic systolic array framework that works in conjunction with an embedded microprocessor on an FPGA, that allows for dynamic and complimentary scaling of acceleration levels of two algorithms active concurrently on the FPGA. Use is made of systolic arrays and hardware-software co-design to obtain an efficient multi-application acceleration system. The flexible and simple framework allows hosting of a broader range of algorithms and extendable to more complex applications in the area of aerospace embedded systems.