DR. RICHARD THIEN NGUYEN, M.D.
Osteopathic Medicine at Camino Del Rio, San Diego, CA

5248626, Sep 28, 1993

Aug 28, 1992

7/937916

Richard Nguyen - San Diego CA
Charles A. Hewett - San Diego CA

The United States of America as represented by the Secretary of the Navy

H01L 21265

437 41

A method for fabricating a self-aligned, gate diffused junction field eff transistor is provided which includes the steps of forming an n-type layer on an indium phosphide, semi-insulating substrate; forming spaced apart source/drain metal contacts on the n-type layer; forming a metal gate on the n-type layer between the spaced apart source/drain contacts, where the metal gate is insulated from the source/drain contacts and includes a metallic p-type dopant material; and forming a p-type region in the n-type layer beneath the metal gate so that the gate contact and the p-type region have coincident boundaries with respect to each other at the surface of the n-type layer. The method may also be employed to manufacture a bipolar transistor by allowing the self-aligned and diffused p-type region to extend through the n-type layer to the semi-insulating substrate.

H12874, Feb 1, 1994

Jun 16, 1992

7/901615

Carl R. Zeisse - San Diego CA
James R. Zeidler - San Diego CA
Charles A. Hewett - San Diego CA
Richard Nguyen - San Diego CA

The United States of America as represented by the Secretary of the Navy - Washington DC

H01L 2978

257410

A field effect transistor comprises a diamond substrate which has a p-type ion implanted region coterminous with a surface of the diamond substrate, wherein the ion implanted region has a hole concentration in the range of 1. times. 10. sup. 15 to 1. times. 10. sup. 17 holes/cm. sup. 2, and a hole mobility equal to or greater than 1 cm. sup. 2 /V-sec; spaced apart source and drain electrodes formed over the p-type ion implanted region on the surface of the diamond substrate; an electrically insulating material formed over the p-type ion implanted region on the surface of the diamond substrate between the source and drain electrodes; and a gate electrode formed on the surface of the insulating material.

5011785, Apr 30, 1991

Oct 30, 1990

7/605623

Richard Nguyen - San Diego CA

The United States of America as represented by the Secretary of the Navy - Washington DC

H01L 2104

437 41

A high transconductance, low capacitance, low leakage compound semiconduc junction field effect transistor (JFET) enhances the low leakage current while having the advantages of a self-aligned JFET including low capacitance and low source-drain resistance. The diffused junction of the JFET is totally covered during the process of manufacture. An n channel on a substrate has a layer of photoresist placed over it and exposed to leave a predefined pattern of photoresist. The patterned photoresist is used as a mask so that part of the n-channel layer is etched down to a desired depth leaving a wedge-shaped region. A layer of insulator, such as silicon dioxide, is deposited over the entire substrate and sides of the w edge-shaped region in insulator regions. Next, the photoresist is then removed. A p. sup. + diffusion or implant is performed in the wedge-shaped region to create a p. sup.

5920065, Jul 6, 1999

Nov 14, 1997

8/970328

Chen-Kuo Sun - San Diego CA
Ching T. Chang - San Diego CA
Donald J. Albares - San Diego CA
Richard Nguyen - San Diego CA

The United States of America as represented by the Secretary of the Navy - Washington DC

H01J 4014

2502141

The optoelectronic switch of the present invention comprises two PIN diodes onnected in series with opposed polarity having their intrinsic regions coupled to a light source for maintaining both diodes in the conductive state while the light source is on and in the non-conductive state while the light source is off.

4769683, Sep 6, 1988

Jun 22, 1987

7/064629

Herbert Goronkin - Scottsdale AZ
George N. Maracas - Tempe AZ
Richard Nguyen - San Diego CA

Motorola Inc. - Schaumburg IL

H01L 2712

357 4

A quasi 1-dimensional electron gas transistor has been provided having a source electrode and a drain electrode. A plurality of electrodes are positioned between the source and drain electrodes in a manner which are parallel to the electron flow between the source and the drain electrodes. In one embodiment, the electrodes are interconnected by a gate electrode while in an alternate embodiment all the electrodes are connected to the source electrode and insulated from the gate electrode. This device provides a quantum wire for quasi 1-dimensional electron flow.

6078111, Jun 20, 2000

Dec 23, 1997

8/997296

Chen-Kuo Sun - Escondido CA
Ching T. Chang - San Diego CA
Richard Nguyen - San Diego CA
Donald J. Albares - San Diego CA

The United States of America as represented by the Secretary of the Navy - Washington DC

H01H 3500

307117

An optoelectronic switch for switching an input signal comprises two PIN des connected in series with opposed polarity, an input signal choke connected to the PIN diodes for presenting a high impedance to the input signal and a low impedance to a PIN diode bias, and a photovoltaic cell connected to the PIN diodes and the input signal choke for generating the PIN diode bias to switch the PIN diodes between a substantially conductive state while the photovoltaic cell receives optical energy from a light source and a substantially non-conductive state while the photovoltaic cell does not receive optical energy from the light source.