Inventors:
Richard Rogers - Fort Collins CO, US
Jeffrey Rearick - Fort Collins CO, US
Cory Groth - Fort Collins CO, US
International Classification:
G01R 27/28
Abstract:
An apparatus and method for compensating clock period elongation during scan testing in an integrated circuit (IC) comprises operating a clock associated with the IC at a frequency (f) at which IC operation is sought to be determined, measuring the actual clock period (T) at a clock output, scan testing the IC, measuring the actual clock period (T) at the clock output, determining a delay by calculating the difference between Tand T, and compensating for the delay by increasing the clock frequency during scan test.