RICHARD BARRY FREY
Engineers in Bend, OR
License number
Pennsylvania PE024771E
Category
Engineers
Type
Professional Engineer
Address
Address
2
Bend, OR 97702
Pennsylvania
Pennsylvania
Professional information
Split-Gate Power Module For Suppressing Oscillation Therein
US Patent:
7342262, Mar 11, 2008
Filed:
Jun 3, 2005
Appl. No.:
11/145042
Inventors:
Richard B. Frey - Bend OR, US
Assignee:
Microsemi Corporation - Bend OR
International Classification:
H01L 27/118
US Classification:
257206, 257E25016, 257690, 257691, 257712, 363132, 438106, 438107
Abstract:
The invention involves a method of packaging and interconnecting four power transistor dies to operate at a first frequency without oscillation at a second frequency higher than the first frequency but lower than a cutoff frequency of the transistors. The dies are mounted on a substrate with a lower side (drain) of each die electrically and thermally bonded to a first area of a conductive layer on the substrate. A source of each die is electrically connected to a second area of the conductive layer on the substrate. A gate of each die is electrically connected to a third, common interior central area of the conductive layer on the substrate via separate electrical leads. The leads are sized to substantially the same electrical length and providing a first impedance corresponding to said electrical length from the common area to each gate that will pass the first frequency substantially unattenuated and providing a second impedance from the gate of one die to the gate of a second die that will substantially attenuate the second frequency. In a first embodiment, the leads take the form of one or more jumper wires in series with a film resistor. In a second embodiment, the leads take the form of one or more meandering striplines having predefined impedance characteristics, and one or more gate bonding pads connected to their respective gates with long jumper wires.
Split-Gate Power Module And Method For Suppressing Oscillation Therein
US Patent:
6939743, Sep 6, 2005
Filed:
Jan 27, 2003
Appl. No.:
10/352314
Inventors:
Richard B. Frey - Bend OR, US
Assignee:
Advanced Power Technology, Inc. - Bend OR
International Classification:
H01L021/44
US Classification:
438117, 438106
Abstract:
The invention involves a method of packaging and interconnecting four power transistor dies to operate at a first frequency without oscillation at a second frequency higher than the first frequency but lower than a cutoff frequency of the transistors. The method comprises mounting the dies on a substrate with a lower side (drain) of each die electrically and thermally bonded to a first area of a conductive layer on the substrate; electrically connecting a source of each die to a second area of the conductive layer on the substrate; and electrically connecting a gate of each die to a third, common interior central area of the conductive layer on the substrate via separate electrical leads. The leads are sized to substantially the same electrical length and providing a first impedance corresponding to said electrical length from the common area to each gate that will pass the first frequency substantially unattenuated and providing a second impedance from the gate of one die to the gate of a second die that will substantially attenuate the second frequency. In accordance with a first embodiment, the leads take the form of one or more jumper wires in series with a film resistor. In accordance with a second embodiment, they take the form of one or more meandering striplines having predefined impedance characteristics, and one or more gate bonding pads connected to their respective gates with long jumper wires.
Rf Power Transistor Package
US Patent:
7956455, Jun 7, 2011
Filed:
Jun 26, 2009
Appl. No.:
12/492858
Inventors:
Richard B. Frey - Bend OR, US
Assignee:
Microsemi Corporation - Bend OR
International Classification:
H01L 23/34
US Classification:
257706, 257E21499
Abstract:
An RF power transistor package with a rectangular ceramic base can house one or more dies affixed to an upper surface of the ceramic base. Source leads attached to the ceramic base extend from at least opposite sides of the rectangular base beneath a periphery of a non-conductive cover overlying the ceramic base. The cover includes recesses arranged to receive the one or more die, the ceramic base, gate and drain leads and a portion of the source leads. The cover further includes bolt holes arranged to clamp the ceramic base and source leads to a heat sink. Bosses at corners of the cover outward of the bolt holes exert a downward bowing force along the periphery of the cover between the bolt holes.
Rf Power Transistor Package
US Patent:
7569927, Aug 4, 2009
Filed:
Sep 21, 2005
Appl. No.:
11/233180
Inventors:
Richard B. Frey - Bend OR, US
Assignee:
Microsemi Corporation - Bend OR
International Classification:
H01L 23/34
US Classification:
257706, 257E21499
Abstract:
An RF power transistor package with a rectangular ceramic base can house one or more dies affixed to an upper surface of the ceramic base. Source leads attached to the ceramic base extend from at least opposite sides of the rectangular base beneath a periphery of a non-conductive cover overlying the ceramic base. The cover includes recesses arranged to receive the one or more die, the ceramic base, gate and drain leads and a portion of the source leads. The cover further includes bolt holes arranged to clamp the ceramic base and source leads to a heat sink. Bosses at corners of the cover outward of the bolt holes exert a downward bowing force along the periphery of the cover between the bolt holes.