Inventors:
Ramasesha Bharat - Orange CA
International Classification:
H03K 2136
Abstract:
A CCD with N bits is clocked at a frequency f, which may be either constant or variable over a wide range. Meanwhile, a charge introduced into the first bit at t = 0 reaches the nth bit, n clock periods later, namely, at t = n/f. If this charge is sensed to give an output signal and the signal is fed back to introduce a charge again into the first bit, then a periodic output is obtained with pulses spaced every n/f seconds; the output frequency is therefore, 1/n times the input clock frequency. Output frequencies f, f/2, f/3,. . . f/N can be obtained by selecting n. The system includes the following structure:
1. A tapped N-bit CCD delay line.
2. Initial charge injection method.
3. Charge sink.
4. n - selector (n = 1, 2, 3,. . . N).
5.