PETER RICHARD BURKE
Medical Practice in Georgia, VT

5268330, Dec 7, 1993

Dec 11, 1992

7/989604

John H. Givens - Essex VT
James S. Nakos - Essex VT
Peter A. Burke - Milton VT
Craig M. Hill - Essex Junction VT
Chung H. Lam - Williston VT

International Business Machines Corporation - Armonk NY

H01L 21283, H01L 21302

437195

A passivating layer is deposited over an integrated circuit device, conventionally fabricated using silicidation, after which an insulating layer is deposited. The insulating layer is planarized and further polished to expose the passivating layer above the gate. The portion of the passivating layer above the gate is removed with little or no effect on the insulating layer or gate. A trench above one or both junctions (source or drain) is formed by removing insulation using the passivating layer as an etch stop, then removing a portion of the passivating layer above the junction with little or no effect on the junction or any isolation region present. The gate may be further silicided, and the opening above the gate and the trench above the junction may each be planarly filled with a low sheet resistance conductive material, forming contacts. The contact above the junction may be borderless.

5510652, Apr 23, 1996

Oct 6, 1994

8/319388

Peter A. Burke - Milton VT
Michael A. Leach - Milpitas CA

International Business Machines Corporation - Armonk NY

H01L 21304, H01L 23485

257752

The invention provides a method for producing a substantially planar surface overlying features of a semiconductor structure. The method comprises forming alternating layers of a hard polishing material and a soft polishing material over the features of the semiconductor structure, and then polishing the alternating layers to form a substantially planar surface over the features. The method takes advantage of the polish rates of the various materials used as alternating layers to enhance the planarization process.

5356513, Oct 18, 1994

Apr 22, 1993

8/051915

Peter A. Burke - Milton VT
Michael A. Leach - Milpitas CA

International Business Machines Corporation - Armonk NY

H01L 2144, H01L 21465

156636

The invention provides a method for producing a substantially planar surface overlying features of a semiconductor structure. The method comprises forming alternating layers of a hard polishing material and a soft polishing material over the features of the semiconductor structure, and then polishing the alternating layers to form a substantially planar surface over the features. The method takes advantage of the polish rates of the various materials used as alternating layers to enhance the planarization process.