PAUL G. BENNETT, CRNA
Nursing at Mcdowell Rd, Phoenix, AZ

5285346, Feb 8, 1994

Dec 13, 1991

7/806197

Robert B. Davies - Tempe AZ
David F. Mietus - Tempe AZ
Paul T. Bennett - Phoenix AZ

Motorola, Inc. - Schaumburg IL

H01L 2978

361103

A control circuit for protecting a power device has been provided. The control circuit has a thermal shutdown circuit for activating a first SCR when the temperature of the control circuit exceeds a predetermined temperature. Additionally, the control circuit has a DSAT detection circuit for activating the first SCR in response to an external signal. The first SCR is coupled across an input terminal and the common terminal of the control circuit. When the first SCR latches, it functions to subsequently latch a second SCR that is coupled across the output and common terminals. The second SCR functions to rapidly discharge the voltage appearing across the output and common terminals. Additionally, the control circuit includes an input level sensitive circuit which may be utilized to deactivate various circuitry depending upon the current level of an input signal supplied to the control circuit.

7595623, Sep 29, 2009

Nov 20, 2006

11/603409

Paul T. Bennett - Phoenix AZ, US

Freescale Semiconductor, Inc. - Austin TX

G05F 1/40

323288, 323283

A spread spectrum switching regulator generally includes an reactive circuit portion coupled to the input terminal, a switching element coupled to the reactive circuit portion, and a control circuit portion coupled between the switching element and the output terminal. The switching element has a drive signal characterized by a duty cycle, and the reactive circuitry portion is configured to produce an output voltage at the output terminal responsive to the duty cycle of the drive signal. The control circuit portion is configured to spread the input power across multiple frequencies by adjusting the drive signal of the switching element, thereby reducing input current noise through spread spectrum techniques. The drive signal is responsive to a pseudo-randomly generated ramp signal.

5029295, Jul 2, 1991

Jul 2, 1990

7/546636

Paul T. Bennett - Phoenix AZ
Robert B. Davies - Tempe AZ
David F. Mietus - Tempe AZ

Motorola, Inc. - Schaumburg IL

G05F 330

323313

A voltage reference circuit is provided for developing an output voltage operating independent of temperature and power supply variation. A current reference circit provides a current reference signal operating independent of power supply variation and having a predetermined temperature coefficient and flowing through a first transistor and a first resistor each having opposite temperature coefficients. The output voltage is established as the sum of the base-emitter junction potential of the first transistor and the potential developed across the first resistor. The temperature coefficient of the potential developed across the first resistor substantially cancels the temperature coefficient across the base-emitter junction of the first transistor thereby providing the output voltage operating independent of temperature and power supply variation.

7667491, Feb 23, 2010

Feb 24, 2006

11/361625

Paul T. Bennett - Phoenix AZ, US
John M. Pigott - Phoenix AZ, US

Freescale Semiconductor, Inc. - Austin TX

H03K 19/094

326 83, 326 81, 326 56, 326 58

Method and apparatus are provided for buffering a data signal to a low voltage logic device. A circuit for buffering the data signal to the low voltage logic device includes an output buffer () having first and second inputs and an output and at least one N-type isolation transistor () having a source coupled to one or both of the second input and the output. The first input receives the data signal, the second input receives a supply potential, and the output couples to the low voltage logic device. The isolation transistor has a drain for receiving a first potential and is configured to supply a second potential to the output buffer when the gate receives a bias potential. The second potential based on the first potential. The bias potential is greater than the supply potential.

5249465, Oct 5, 1993

Dec 11, 1990

7/626133

Paul T. Bennett - Phoenix AZ
William C. Dunn - Mesa AZ

Motorola, Inc. - Schaumburg IL

G01P 1513

73510

An accelerometer in which the seismic mass is formed in the shape of an annulus. The annular shape allows twisting motions as well as displacement of the seismic mass to be sensed and restoring electrostatic forces applied. This allows the supporting spring to be made extremely weak avoiding the mechanical limitations of springs.

5323051, Jun 21, 1994

Dec 16, 1991

7/807338

Victor J. Adams - Tempe AZ
Paul T. Bennett - Phoenix AZ
Henry G. Hughes - Scottsdale AZ
Brooks L. Scofield - Tempe AZ
Marilyn J. Stuckey - Phoenix AZ

Motorola, Inc. - Schaumburg IL

H01L 2302

257417

A semiconductor wafer level package used to encapsulate a device fabricated on a semiconductor substrate wafer before dicing of the wafer into individual chips. A cap wafer is bonded to the semiconductor substrate wafer using a pre-patterned frit glass as a bonding agent such that the device is hermetically sealed inside a cavity. A hole in the cap wafer allows electrical connections to be made to the device through electrodes which pass through the frit glass seal.

5235215, Aug 10, 1993

Dec 13, 1991

7/806198

Robert B. Davies - Tempe AZ
David F. Mietus - Tempe AZ
Paul T. Bennett - Phoenix AZ

Motorola, Inc. - Schaumburg IL

H03K 1772, H03K 3352

307284

A memory circuit which includes a memory SCR and an output SCR is provided. The memory SCR is coupled between the input terminal and the common terminal of the memory circuit wherein the input terminal is the control terminal of the output SCR and the output SCR is coupled across the output terminal and the common terminal of the memory circuit. When the memory SCR latches, it functions to subsequently latch the output SCR. Because the output SCR has a greater forward operating voltage than the memory SCR and by providing a current path from the output terminal to the memory SCR, the memory SCR remains latched during the transition period of when the output SCR goes from a latched state to an unlatched state.

5325065, Jun 28, 1994

May 18, 1992

7/884978

Paul T. Bennett - Phoenix AZ
David F. Mietus - Tempe AZ

Motorola, Inc. - Schaumburg IL

G01P 1508

324661

A detection circuit for sensing small capacitive changes has been provided. The detection circuit includes a dummy integrator stage that compensates for a voltage step that results from charge injection due to an existing switch in a first integrator stage. As a result, the detection circuit is insensitive to switch injection and amplifier offset voltages.

5170312, Dec 8, 1992

Nov 4, 1991

7/787165

Robert B. Davies - Tempe AZ
David F. Mietus - Tempe AZ
Paul T. Bennett - Phoenix AZ

Motorola, Inc. - Schaumburg IL

H02H 308

361100

A method for protecting a semiconductor power die has been provided. The method involves inserting an integrated circuit die between the gate lead of a package containing the semiconductor power die and the actual gate terminal of the semiconductor power die. As a result, any current flowing into the gate lead of the package must pass through the integrated circuit die before entering the semiconductor power die. This allows the integrated circuit die to monitor and control the semiconductor power die.

5209117, May 11, 1993

Oct 22, 1990

7/600949

Paul T. Bennett - Phoenix AZ

Motorola, Inc. - Schaumburg IL

G01P 15125

73517R

A method of making a sensor with a mass (14) that is supported by at least one tapered cantilever beam (11). Tapered cantilever beam or beams (11) can be used in either capacitive or piezo-resistive structure. Increased sensitivity and decreased fragility is obtained by using the tapered cantilever beam.