PAUL E PIERCE, MD
Osteopathic Medicine in Albuquerque, NM
License number
New Mexico 73188
Category
Osteopathic Medicine
Type
Gastroenterology
Address
Address
1001 Pmg Gi Silver STE 200, Albuquerque, NM 87106
Phone
(505) 224-7000
(505) 244-7292 (Fax)
(505) 923-5356
(505) 923-5354 (Fax)
(505) 244-7292 (Fax)
(505) 923-5356
(505) 923-5354 (Fax)
Personal information
See more information about PAUL E PIERCE at radaris.comName
Address
Phone
3513 California St NE, Albuquerque, NM 87110
3308 Santa Fe Ct, Farmington, NM 87401
3 Avila Ct, Santa Fe, NM 87508
1001 Silver Ave SE, Albuquerque, NM 87106
Organization information
See more information about PAUL E PIERCE at bizstanding.comPresbyterian Hospital - Tahir Quseem MD
3715 Southern Blvd SE, Rio Rancho, NM 87124
Doing business as:
Presbyterian Hospital - Paul E Pierce MD
Phone:
(505) 224-7000 (Phone)
Categories:
Gastroenterology Physicians & Surgeons, Internal Medicine Physicians & Surgeons, Physicians & Surgeons
Specialties:
Digestive & Liver Gastroenterology
Professional information
See more information about PAUL E PIERCE at trustoria.com
Dr. Paul E Pierce, Rio Rancho NM - MD (Doctor of Medicine)
Dr. Paul E Pierce, Rio Rancho NM - MD (Doctor of Medicine)
Specialties:
Gastroenterology
Address:
Presbyterian Medical Grp GAS
3715 Southern Blvd SE, Rio Rancho 87124
(505) 224-7000 (Phone)
3715 Southern Blvd SE, Rio Rancho 87124
(505) 224-7000 (Phone)
Certifications:
Gastroenterology, 1977, Internal Medicine, 1975
Awards:
Healthgrades Honor Roll
Languages:
English, Spanish
Hospitals:
Presbyterian Medical Grp GAS
3715 Southern Blvd SE, Rio Rancho 87124
Presbyterian Hospital
1100 Central Ave South #East, Albuquerque 87106
3715 Southern Blvd SE, Rio Rancho 87124
Presbyterian Hospital
1100 Central Ave South #East, Albuquerque 87106
Education:
Medical School
Weill Cornell Medical College
Graduated: 1967
Cornell U Hosps
U Nm Hosps
Weill Cornell Medical College
Graduated: 1967
Cornell U Hosps
U Nm Hosps
Paul E Pierce, Albuquerque NM
Paul E Pierce, Albuquerque NM
Specialties:
Gastroenterologist
Address:
1001 Silver Ave Se, Albuquerque, NM 87106
3715 Southern Blvd Se, Albuquerque, NM 87124
3715 Southern Blvd Se, Albuquerque, NM 87124
Education:
Cornell University, Weill Cornell Medical College - Doctor of Medicine*
Children's Hospital of New Mexico - Fellowship - Gastroenterology (Internal Medicine)*
Children's Hospital of New Mexico - Residency - Family Medicine*
New York Presbyterian Hospital/Weill Cornell Medical Center - Residency - Family Medicine*
Children's Hospital of New Mexico - Fellowship - Gastroenterology (Internal Medicine)*
Children's Hospital of New Mexico - Residency - Family Medicine*
New York Presbyterian Hospital/Weill Cornell Medical Center - Residency - Family Medicine*
Board certifications:
American Board of Internal Medicine Certification in Internal Medicine*, American Board of Internal Medicine Sub-certificate in Gastroenterology (Internal Medicine)*
Paul Edwin Pierce, Albuquerque NM
Paul Edwin Pierce, Albuquerque NM
Specialties:
Internal Medicine, Gastroenterology
Work:
Presbyterian Medical Group
1001 Silver Ave SE, Albuquerque, NM 87106 Presbyterian Hospital
1100 Central Ave SE, Albuquerque, NM 87106 Presbyterian Healthcare Svcs.
8300 Constitution Ave NE, Albuquerque, NM 87110 Presbyterian Healthcare Svcs.
2400 Unser Blvd SE, Rio Rancho, NM 87124
1001 Silver Ave SE, Albuquerque, NM 87106 Presbyterian Hospital
1100 Central Ave SE, Albuquerque, NM 87106 Presbyterian Healthcare Svcs.
8300 Constitution Ave NE, Albuquerque, NM 87110 Presbyterian Healthcare Svcs.
2400 Unser Blvd SE, Rio Rancho, NM 87124
Education:
Cornell University (1967)
Hardware Multiplier Processor
Hardware Multiplier Processor
US Patent:
4589085, May 13, 1986
Filed:
Apr 26, 1983
Appl. No.:
6/488824
Inventors:
Paul E. Pierce - Albuquerque NM
Assignee:
The United States of America as represented by the United States
Department of Energy - Washington DC
Department of Energy - Washington DC
International Classification:
G06F 752
US Classification:
364754
Abstract:
A hardware processor is disclosed which in the described embodiment is a memory mapped multiplier processor that can operate in parallel with a 16 bit microcomputer. The multiplier processor decodes the address bus to receive specific instructions so that in one access it can write and automatically perform single or double precision multiplication involving a number written to it with or without addition or subtraction with a previously stored number. It can also, on a single read command automatically round and scale a previously stored number. The multiplier processor includes two concatenated 16 bit multiplier registers, two 16 bit concatenated 16 bit multipliers, and four 16 bit product registers connected to an internal 16 bit data bus. A high level address decoder determines when the multiplier processor is being addressed and first and second low level address decoders generate control signals. In addition, certain low order address lines are used to carry uncoded control signals.
Multi-Processor Including Data Flow Accelerator Module
Multi-Processor Including Data Flow Accelerator Module
US Patent:
4893234, Jan 9, 1990
Filed:
Jan 15, 1987
Appl. No.:
7/003540
Inventors:
George S. Davidson - Albuquerque NM
Paul E. Pierce - Albuquerque NM
Paul E. Pierce - Albuquerque NM
Assignee:
United States Department of Energy - Washington DC
International Classification:
G06F 1300
US Classification:
364200
Abstract:
An accelerator module for a data flow computer includes an intelligent memory. The module is added to a multiprocessor arrangement and uses a shared tagged memory architecture in the data flow computer. The intelligent memory module assigns locations for holding data values in correspondence with arcs leading to a node in a data dependency graph. Each primitive computation is associated with a corresponding memory cell, including a number of slots for operands needed to execute a primitive computation, a primitive identifying pointer, and linking slots for distributing the result of the cell computation to other cells requiring that result as an operand. Circuitry is provided for utilizing tag bits to determine automatically when all operands required by a processor are available and for scheduling the primitive for execution in a queue. Each memory cell of the module may be associated with any of the primitives, and the particular primitive to be executed by the processor associated with the cell is identified by providing an index, such as the cell number for the primitive, to the primitive lookup table of starting addresses. The module thus serves to perform functions previously performed by a number of sections of data flow architectures and coexists with conventional shared memory therein.