Michael D. Turner
Engineering at Stoneway Cir, Madison, AL

6393029, May 21, 2002

Nov 10, 1999

09/438555

Michael D. Turner - Madison AL
Kevin W. Schneider - Huntsville AL
Richard A. Burch - Madison AL
Richard L. Goodson - Huntsville AL

Adtran, Inc. - Huntsville AL

H04L 1228

370419

The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

6608840, Aug 19, 2003

Apr 24, 2002

10/131654

Michael D. Turner - Madison AL
Kevin W. Schneider - Huntsville AL
Richard A. Burch - Madison AL
Richard L. Goodson - Huntsville AL

Adtran Inc. - Huntsville AL

H04J 316

370466

The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

5539785, Jul 23, 1996

Jul 27, 1994

8/281461

Richard A. Burch - Madison AL
Kevin W. Schneider - Huntsville AL
Michael D. Turner - Madison AL

Adtran - Huntsville AL

H04L 700

375371

A jitter/wander reduction circuit is provided for a desynchronizer deriving an output clock signal from an independent clock signal and phase adjustment signals. Phase adjustment signals relate to a deviation of the independent clock signal from an input clock signal. The circuit includes a frequency offset estimation circuit receiving phase adjustment signals and providing a frequency offset estimation signal. A phase controller receives the frequency offset estimation signal, provides a feedback signal to the frequency offset estimation circuit, and provides a phase difference signal. A clock generator circuit receives the independent clock signal and the phase difference signal. The independent clock signal is adjusted based on the phase difference signal to provide an output clock signal.

5526377, Jun 11, 1996

Dec 12, 1994

8/354366

Harry Yedid - Huntsville AL
Richard A. Burch - Madison AL
Michael D. Turner - Madison AL
Kevin W. Schneider - Huntsville AL

Adtran - Huntsville AL

H03H 730, H04B 110

375229

The need to employ costly precision components to reduce non-linearities in the signal processing path of noise reduction circuitry such as an echo canceler and decision feedback equalizer is successfully addressed by a transversal filter which is capable of effectively tracking for non-linearities in system components that manifest themselves as added noise introduced into the signal propagation path. This non-linear tracking capability is attained by employing cascaded sets of weighting coefficient and scaling factor multiplying stages. The first set of weighting coefficients effectively modifies the contents of each of the transmitted symbol samples in the transversal filter delay line to produce respective sets of `partial sums` associated with the respective data symbols employed in the data modulation scheme. The second, cascaded set of `scaling` coefficients or factors is employed to scale selected ones of the sets of the partial sums.

5793824, Aug 11, 1998

Apr 30, 1996

8/641226

Richard A. Burch - Madison AL
Michael D. Turner - Madison AL

Adtran, Inc. - Huntsville AL

H04J 307

375372

A bandwidth-adaptive digital phase locked loop-based clock control arrangement controls the generation of a read-out clock used for retiming digital data signal interfaced with a synchronous data channel of a communication system, in which pulse-stuffing synchronization is employed to maintain clock synchronization of the digital data signal that is not bit-synchronous with a synchronous digital data channel over which the digital data signal is transported. The bandwidth-adaptive digital phase locked loop includes a loop filter to which the error signal is applied and a phase accumulator, coupled to the output of the loop filter and being operative to stepwise adjust the read-out clock signal. The loop filter has a first scaled path that includes a first, controllably stepped gain stage, and a second scaled path that includes a second, controllably stepped gain stage coupled to a frequency accumulator. The output of the frequency accumulator and the first stepped gain stage are summed and coupled to the phase accumulator.

4777640, Oct 11, 1988

Jun 9, 1986

6/872076

Michael D. Turner - Madison AL
Jack L. Hayes - Huntsville AL

Motorola, Inc. - Schaumburg IL

H04L 2540, H04L 2706

375118

A modem receiver circuit comprises one or more phase jitter canceling circuits for reducing sinusoidal components of phase jitter in a telecommunications channel. The receiver circuit automatically tracks multiple sinusoidal frequency components and jitter components varying slowly in amplitude and frequency. Each phase jitter canceling circuit is responsive to a phase angle error signal, which is scaled by an adaptive gain constant and appropriately signed. The corrected error signal is passed through a second order loop filter which contains an accumulator with a jitter frequency estimate. The output is integrated into an estimate of the phase of the sinusoidal jitter, which is converted into an estimate of the jitter angle by using a sine lookup table. The resulting estimated jitter component angle is added to the carrier loop phase angle estimate to derive a total receiver phase estimate. The circuit provides rapid acquisition of an accurate initial estimate for the jitter component.

5809033, Sep 15, 1998

Nov 20, 1995

8/560812

Michael D. Turner - Madison AL
Kevin W. Schneider - Huntsville AL
Richard A. Burch - Madison AL
Richard L. Goodson - Huntsville AL

Adtran, Inc. - Huntsville AL

H04J 312

370522

The range of digital data communication services, such as a basic rate 2B1Q ISDN channel, to customer premises located beyond the industry standard achievable range of a two-wire loop can be extended by increasing the capacity of the ISDN line code from two information bits per symbol to three information bits per symbol, so as to reduce the effective symbol rate, which is error correction encoded to an effective 4B1H line code for defining a sixteen level PAM signal waveform, and employing enhanced low signal-to-noise ratio signal processing techniques in both the transmitter and receiver to accommodate the increased insertion loss of the two-wire line resulting from its extended length. Such enhanced low signal-to-noise ratio signal processing techniques include a Tomlinson precoder in the transmitter, and an adaptive linear equalizer and a module unit in the receiver.

5680422, Oct 21, 1997

Apr 27, 1995

8/429951

Richard A. Burch - Madison AL
Kevin W. Schneider - Huntsville AL
Michael D. Turner - Madison AL
Timothy D. Rochell - Elkmont AL

Adtran - Huntsville AL

H04L 700, H04J 307

375371

A wander reduction mechanism in an HDSL pulse-stuffing synchronization system provides a more precise measure of the phase of the incoming asynchronous signal than is obtained in conventional schemes, in which the only information available is the presence or absence of stuffing pulses. An auxiliary phase comparator and phase adjuster are incorporated into the synchronizer-multiplexer to generate a reference data clock (derived from the synchronized data clock), so that the incoming unsynchronized data clock can be tracked. As the clock is iteratively phase-adjusted, the respective changes are accumulated. At the end of a prescribed measurement interval, the net contents of the accumulator are encoded and transported over the synchronous digital data communication channel to the receiver. By decoding this sequence information, the desynchronizer is able to generate a desynchronized data clock having the same number of net phase adjustments during a measurement period as the reference clock at the synchronizer.

4969144, Nov 6, 1990

Jan 3, 1989

7/292848

Steven R. Blackwell - Huntsville AL
Steven E. Turner - Madison AL
Michael D. Turner - Madison AL
Jerry D. Moore - Huntsville AL

Universal Data Systems, Inc. - Huntsville AL

H04B 323

370 321

A passband echo canceller achieves improved performance by providing a signal having a substantially uniform power spectral density to an adaptive echo canceller; the improved input signal is substantially uniform from approximately zero hertz to one half the operating or sample frequency of the echo canceller. This signal may comprise that range of frequencies occupied by the transmitted spectrum with added out of band noise.