MICHAEL ALVIN HOWARD
Pilots at Brewster Ct, San Diego, CA

6701482, Mar 2, 2004

Sep 20, 2001

09/957820

Rohan S. Salvi - San Diego CA
Michael A. Howard - San Diego CA

Qualcomm Incorporated - San Diego CA

H03M 1303

714786, 714755

A concatenated encoder capable of coding multiple data bits in parallel and including a first (outer) encoder, a memory, and a second (inner) encoder coupled in cascade. The first encoder receives and codes M data bits in parallel in accordance with a first coding scheme to generate MR code bits. The memory receives and stores unpunctured ones of the MR code bits from the first encoder. The second encoder receives and codes N code bits in parallel in accordance with a second coding scheme to generate coded data. M and N can be any values (e. g. , M 8, N 4). Each encoder can be a (e. g. , a rate ½) convolutional encoder that implements a particular polynomial generator, and can be implemented with one or more look-up tables, a state machine, or some other design.

7106782, Sep 12, 2006

Dec 17, 2002

10/322246

Michael A. Howard - San Diego CA, US
Peter J. Black - San Diego CA, US

Qualcomm, Inc. - San Diego CA

H04B 1/707

375146, 455126, 4551272

Techniques to adjust the phase rotation of a modulated signal to compensate for the phase rotation introduced by circuit elements associated with the transmit signal path. In one implementation, at least one control signal is received, with each control signal being provided to adjust a particular characteristic (e. g. , gain, bias current) of one or more circuit elements (e. g. , VGA, PA) associated with the transmit signal path. The circuit elements can be located directly in, or operatively coupled to, the transmit signal path. A phase rotation corresponding to an operating state defined by the received control signal(s) is then determined, and the phase of the modulated signal is rotated by an amount related to the determined phase rotation. The phase rotation compensation can be performed at various locations along the transmit signal path by rotating either the data, the PN sequences used to spectrally spread the data, or the carrier signals used to modulate the data.

2011014, Jun 16, 2011

Dec 13, 2010

12/966185

Taesang Yoo - San Diego CA, US
Tao Luo - San Diego CA, US
Yongbin Wei - San Diego CA, US
Hanfang Pan - San Diego CA, US
Michael A. Howard - San Diego CA, US

QUALCOMM INCORPORATED - San Diego CA

H04B 15/00

455 631

Certain aspects of the disclosure propose parallel channel estimation and interference cancellation in a wireless communications system. For each common reference signal tone offset, interference cancellation and channel estimation may be performed independently. The proposed channel estimation method may increase performance of a system.

6954885, Oct 11, 2005

Dec 14, 2001

10/020532

James Y. Hurt - San Diego CA, US
Michael A. Howard - San Diego CA, US
Robert J. Fuchs - San Diego CA, US

Qualcomm Incorporated - San Diego CA

H03M013/27, H03M013/29

714701, 714702, 714755

A method and apparatus for encoding multiple bits in parallel wherein outputs are generated recursively. During each clock cycle, the encoder processes multiple bits and generates outputs consistent with those generated sequentially over multiple clock cycles in a conventional convolutional encoder. In one embodiment, input data is stored in multiple memory storage units, which are then each uniquely addressed to provide data to parallel encoders.

2011019, Aug 11, 2011

Dec 15, 2010

12/968674

Taesang Yoo - San Diego CA, US
Tao Luo - San Diego CA, US
Yongbin Wei - San Diego CA, US
Hanfang Pan - San Diego CA, US
Michael A. Howard - San Diego CA, US

QUALCOMM INCORPORATED - San Diego CA

H04W 24/00

370252

Certain aspects of the disclosure propose a unified channel estimation algorithm that combines two or more channel estimation algorithms in a single piece of hardware or software. The proposed unified channel estimation may dynamically switch, based on one or more metrics, between different modes of operation that utilize different channel estimation algorithms.

2004013, Jul 15, 2004

Dec 22, 2003

10/745089

Rohan Salvi - San Diego CA, US
Michael Howard - San Diego CA, US

H03M013/00

714/759000

A concatenated encoder capable of coding multiple data bits in parallel and including a first (outer) encoder, a memory, and a second (inner) encoder coupled in cascade. The first encoder receives and codes M data bits in parallel in accordance with a first coding scheme to generate MR code bits. The memory receives and stores unpunctured ones of the MR code bits from the first encoder. The second encoder receives and codes N code bits in parallel in accordance with a second coding scheme to generate coded data. M and N can be any values (e.g., M 8, N 4). Each encoder can be a (e.g., a rate ½) convolutional encoder that implements a particular polynomial generator, and can be implemented with one or more look-up tables, a state machine, or some other design.

2011028, Nov 17, 2011

May 10, 2011

13/104844

Wei-Hsin Chang - San Diego CA, US
Hanfang Pan - San Diego CA, US
Michael Alexander Howard - San Diego CA, US
Wenqing Wu - San Diego CA, US

QUALCOMM INCORPORATED - San Diego CA

H04W 72/04, H04W 24/00

370241, 370335

Certain aspects of the present disclosure relate to a method for processing wireless communications. According to one aspect, a processing unit may receive a plurality of code blocks of a transport block and schedule the plurality of code blocks to be decoded in parallel with a plurality of decoders. Each decoder decodes at least one code block as an independent tasks. The processing unit further collects the decoded information bits from the plurality of decoders and forwards the collected decoded information bits for further processing. In one aspect, the processing unit includes an output agent to temporarily store the decoded information bits while waiting for all code blocks of the transport block to be decoded.

8614977, Dec 24, 2013

May 9, 2011

13/103912

Wenqing Wu - San Diego CA, US
Hanfang Pan - San Diego CA, US
Michael A. Howard - San Diego CA, US

QUALCOMM Incorporated - San Diego CA

H04W 4/00

370328

A wireless communication signal in Long Term Evolution (LTE) may be interleaved in a manner which permits a partitioning of a received inter-column bit-reversed interleaved code block for improved de-interleaving. The code block may be divided into equal subportions which may be simultaneously de-interleaved both forward and backward, and in parallel with other subportions. An even number of subportions may be provided. Dividing a received code block in this manner may improve de-interleaving performance.