Inventors:
Edward Cooney - Jericho VT, US
Robert Geffken - Burlington VT, US
Vincent McGahay - Poughkeepsie NY, US
William Motsiff - Essex Junction VT, US
Mark Murray - Burlington VT, US
Amanda Piper - Poughkeepsie NY, US
Anthony Stamper - Williston VT, US
David Thomas - Richmond VT, US
Elizabeth Webster - Burlington VT, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
H01L021/311
Abstract:
A method and structure for semiconductor structure includes a plurality of adjacent wiring levels, conductors within each of the wiring levels, and liners at least partially surrounding each of the conductors. The liners of adjacent wiring levels are made of different materials which have different etching characteristics and are selectively etchable with respect to one another. The liners can be tantalum, tungsten, etc. The liners surround at least three sides of the conductors. Each of the wiring levels has a first insulator layer which has a first dielectric material. The liners and the conductors are positioned within the first dielectric material. A second insulator layer has a second dielectric material over the first insulator layer. The first dielectric material has a lower dielectric constant than the second dielectric material. The first dielectric material can be silicon dioxide, fluorinated silicon dioxide (FSD), microporous glasses, etc. The second dielectric material can be one of nitrides, oxides, tantalum, tungsten, etc.