Mark Jones
Electrician in Tucson, AZ

6472936, Oct 29, 2002

May 14, 2001

09/854821

Mark Alan Jones - Tucson AZ

National Semiconductor Corporation - Santa Clara CA

H03F 114

330 51, 330295, 330286

There is disclosed an improved variable gain low-noise amplifier. The variable gain low-noise amplifier comprises: 1) an input transistor having a first ground terminal coupled to ground and an input terminal coupled to an input signal; 2) N output transistor, each of the N output transistors having a first output terminal coupled to a second output terminal of the input transistor; 3) N switches, each of the N switches turning a corresponding one of the N output transistors ON and OFF by selectively coupling an input terminal of the corresponding one of the N output transistors to one of: 1) an enabling voltage and 2) a disabling voltage; and 4) an inductor comprising a first inductor terminal coupled to a supply voltage, a second inductor terminal coupled to a second output terminal of a first one of the N output transistors, and N-1 tap points intermediate the first and second inductor terminals, each of the N-1 tap points coupled to a second output terminal of a corresponding one of the remaining N-1 output transistors.

6653908, Nov 25, 2003

Oct 18, 2001

09/982762

Mark Alan Jones - Tucson AZ

National Semiconductor Corporation - Santa Clara CA

H03B 500

331183, 331182, 331185, 331177 V, 331 74

An oscillator with oscillator and voltage control circuitry for generating an oscillation signal having an amplitude that is automatically controlled for a selectively minimized phase noise. Automatic level control is used for controlling the amplitude of the oscillation signal such that the phase noise of the oscillation signal can be maintained at some selected level, e. g. , minimized. The minimum signal voltage appearing across the oscillation circuit is monitored for controlling the bias of the circuit to prevent it from entering a saturation state, thereby avoiding adverse loading effects responsible for degraded phase noise performance.

2005028, Dec 29, 2005

Jun 28, 2004

10/878849

Mark Jones - Tucson AZ, US

H03F003/45

330255000

A folded-cascode operational amplifier including a differential input stage () and a class AB output stage () includes a first slew boost current mirror () and a second slew boost current mirror () having inputs connected to drains of the input transistors, respectively. Each current mirror amplifies excess tail current steered into it as a result of a large, rapid input signal transition. The amplified excess tail current is used to boost the slew rate of the class AB output stage. in accordance with a first polarity of the difference between the first (Vin+) and second (Vin−) input voltages. The drains of the input transistors are maintained at a voltage less than a transistor threshold voltage above the ground except during slewing operation of the operational amplifier to effectively isolate the current mirrors except during slewing operation.

7342450, Mar 11, 2008

Apr 11, 2006

11/401492

Mark A. Jones - Tucson AZ, US

Texas Instruments Incorporated - Dallas TX

H03F 3/45

330253, 330260, 330261, 327561

A folded-cascode operational amplifier including a differential input stage () and a class AB output stage () includes a first slew boost current mirror () and a second slew boost current mirror () having inputs connected to drains of the input transistors, respectively. Each current mirror amplifies excess tail current steered into it as a result of a large, rapid input signal transition. The amplified excess tail current is used to boost the slew rate of the class AB output stage in accordance with a first polarity of the difference between the first (Vin+) and second (Vin−) input voltages. The drains of the input transistors are maintained at a voltage less than a transistor threshold voltage above the ground except during slewing operation of the operational amplifier to effectively isolate the current mirrors except during slewing operation.

6853838, Feb 8, 2005

May 14, 2001

09/854737

Mark Alan Jones - Tucson AZ, US

National Semiconductor Corporation - Santa Clara CA

H04B001/06

4552341, 455116, 4552411, 330252, 331 75

An improved single-ended input differential pair amplifier stage comprises: 1) a first p-n-p transistor having a base terminal coupled to an input voltage; 2) a first load impedance having a first terminal coupled to a ground reference and a second terminal coupled to a collector of the first p-n-p transistor; 3) a second p-n-p transistor having a base terminal coupled to the ground reference; 4) a second load impedance having a first terminal coupled to a ground reference and a second terminal coupled to a collector of the second p-n-p transistor; 5) an inductor having a first terminal coupled to an emitter of the first p-n-p transistor and a second terminal coupled to an emitter of the second p-n-p transistor; and 6) a constant current source coupled to the emitter of the second p-n-p transistor.