MANPREET SINGH KHAIRA
Pilots at Countryview Way, Portland, OR
License number
Oregon A2876468
Issued Date
Oct 2015
Expiration Date
Oct 2017
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
13555 NW Countryview Way NW COUNTRYVIEW WAY, Portland, OR 97229
Personal information
See more information about MANPREET SINGH KHAIRA at radaris.comName
Address
Phone
13555 NW Countryview Way, Portland, OR 97229
20795 Amber View Ln, Beaverton, OR 97006
5245 152Nd Pl, Portland, OR 97229
Professional information
Wireless Multi-Microphone System For Voice Communication
US Patent:
2007023, Oct 11, 2007
Filed:
Apr 11, 2006
Appl. No.:
11/279340
Inventors:
Mats MYRBERG - Seattle WA, US
Manpreet Khaira - Portland OR, US
Manpreet Khaira - Portland OR, US
Assignee:
Avnera Corporation - Beaverton OR
International Classification:
H04M 1/00
US Classification:
455569100, 455575200
Abstract:
A wireless communication system includes a wireless terminal and a host device. The wireless terminal includes a transceiver and a processor. The transceiver of the wireless terminal transmits electrical audio signals output from a plurality of microphones over a wireless communication link for enhancement processing, such as noise-cancellation processing, echo-cancellation processing, and/or sidetone processing, at the host device. The wireless communication link can be an electromagnetic-based wireless communication link, a light-based wireless communication link and/or a magnetic-induction-based wireless communication link. The transceiver of the wireless terminal further receives from the wireless communication link enhancement-processed signals based on the electrical audio signals. The processor of the wireless terminal uses the enhancement-processed signals to output an enhanced audio output signal from the terminal device.
Pad-Type Device Case Providing Enhanced Audio Functionality And Output
US Patent:
2013015, Jun 20, 2013
Filed:
Mar 13, 2012
Appl. No.:
13/419222
Inventors:
Robert C. Proebstel - Beaverton OR, US
Patrick A. Quinn - Aloha OR, US
Manpreet S. Khaira - Portland OR, US
Thomas Irrgang - Portland OR, US
Nigel D. Waites - Lakeville MN, US
Ian J. Myles - Sunnyvale CA, US
Patrick A. Quinn - Aloha OR, US
Manpreet S. Khaira - Portland OR, US
Thomas Irrgang - Portland OR, US
Nigel D. Waites - Lakeville MN, US
Ian J. Myles - Sunnyvale CA, US
International Classification:
H04R 1/02, H04R 3/00
US Classification:
381 91
Abstract:
A soundskin for a pad-type device comprises a housing, at least one microphone, a signal processing device, at least one audio transducer, and an acoustic waveguide. The housing receives a pad-type device. The signal processing device receives a signal from a pad-type device when the pad-type device is received by the housing. The signal processing device provides a directive sound enhancement of the audio input signals based on room acoustics, such as reverberation, echo, noise, delay, frequency response, and/or speaker-positional information that is determined by the signal processing device. The audio transducer device generates an audible audio output in response to an audio signal output from the signal processing device. The acoustic waveguide receives the audible audio output and generates an enhanced bass audio output from the acoustic waveguide.
Logic Verification In Large Systems
US Patent:
7171347, Jan 30, 2007
Filed:
Jul 2, 1999
Appl. No.:
09/347690
Inventors:
Manpreet S. Khaira - Portland OR, US
Steve W. Otto - Portland OR, US
Honghua H. Yang - Portland OR, US
Mandar S. Joshi - Aloha OR, US
Jeremy S. Casas - Portland OR, US
Erik M. Seligman - Beaverton OR, US
Steve W. Otto - Portland OR, US
Honghua H. Yang - Portland OR, US
Mandar S. Joshi - Aloha OR, US
Jeremy S. Casas - Portland OR, US
Erik M. Seligman - Beaverton OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 17/50, G06F 9/455, G06F 9/45
US Classification:
703 15, 703 14, 703 28, 716 1, 716 2, 716 7
Abstract:
A method of preparing a circuit model for simulation comprises decomposing the circuit model having a number of latches into a plurality of extended latch boundary components and partitioning the plurality of extended latch boundary components. Decomposing and partitioning the circuit model may include decomposing hierarchical cells of the circuit model, and using a constructive bin-packing heuristic to partition the plurality of extended latch boundary components. The partitioned circuit model is compiled, and simulated on a uni-processor, a multi-processor, or a distributed processing computer system.
Method And Apparatus For Performing Distributed Simulation Utilizing A Simulation Backplane
US Patent:
7319947, Jan 15, 2008
Filed:
Dec 22, 1999
Appl. No.:
09/470875
Inventors:
Manpreet S. Khaira - Portland OR, US
Erik M. Seligman - Beaverton OR, US
Jeremy S. Casas - Portland OR, US
Steve W. Otto - Portland OR, US
Mandar S. Joshi - Aloha OR, US
Erik M. Seligman - Beaverton OR, US
Jeremy S. Casas - Portland OR, US
Steve W. Otto - Portland OR, US
Mandar S. Joshi - Aloha OR, US
Assignee:
Intel Corporation - Santa Clara CA
International Classification:
G06F 17/50, G06F 9/45, G06G 7/62
US Classification:
703 17, 716 3, 716 4, 716 6
Abstract:
A method and apparatus for performing distributed simulation is presented. According to an embodiment of the present invention, simulators are interfaced to a simulation backplane via simulator-dependent interfaces (SDI's). The simulators exchange messages via the simulation backplane and the SDI's. The SDI's convert the exchanged messages between a data format supported by the backplane and a data format supported by the simulator to which the interface is connected. By interfacing the simulators with the backplane via SDI's, the validation environment may be changed without reconfiguring the backplane.