Lisa Marie Miller
Nursing at Seneca St, Fort Collins, CO
License number
Colorado 41904
Issued Date
Dec 30, 2004
Renew Date
Dec 30, 2004
Expiration Date
Jun 30, 2006
Type
Licensed Practical Nurse
Address
Address
4500 Seneca St #14, Fort Collins, CO 80526
Professional information
Director Of Assessment &Amp; Specialty Counseling Services At Csu
Position:
Director of Assessment & Specialty Counseling Services at CSU, Director of Specialty Counseling Services at Colorado State University Health Network (Counseling Services)
Location:
Fort Collins, Colorado Area
Industry:
Higher Education
Work:
CSU
-
Director of Assessment & Specialty Counseling Services
Colorado State University Health Network (Counseling Services)
since 2010
-
Director of Specialty Counseling Services
Waiver Mechanism For Physical Verification Of System Designs
US Patent:
8046726, Oct 25, 2011
Filed:
Sep 16, 2008
Appl. No.:
12/211238
Inventors:
Viswanathan Lakshmanan - Thornton CO, US
Michael Josephides - Broomfield CO, US
Lisa M. Miller - Windsor CO, US
Michael Josephides - Broomfield CO, US
Lisa M. Miller - Windsor CO, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
G06F 17/50, G06F 9/455
US Classification:
716111
Abstract:
A method of waiving verification failures is disclosed. The method generally includes the steps of (A) generating a plurality of circuit error files by performing a plurality of physical verifications on a plurality of circuit designs, the circuit error files containing a plurality of circuit errors of the circuit designs, (B) generating a system error file by performing an additional physical verification on a system design, the system error file containing a plurality of system errors of the system design, the system design incorporating the circuit designs and (C) generating a valid error file by removing the circuit errors from the system error file, the valid error file containing a plurality of valid errors comprising a subset of the system errors.
Skip Mask Table Automated Context Generation
US Patent:
7596639, Sep 29, 2009
Filed:
Sep 1, 2004
Appl. No.:
10/931668
Inventors:
Jackson Lloyd Ellis - Fort Collins CO, US
Kurt Jay Kastein - Fort Collins CO, US
Lisa Michele Miller - Fort Collins CO, US
Praveen Viraraghavan - Fort Collins CO, US
Kurt Jay Kastein - Fort Collins CO, US
Lisa Michele Miller - Fort Collins CO, US
Praveen Viraraghavan - Fort Collins CO, US
Assignee:
LSI Corporation - Milpitas CA
International Classification:
G06F 13/28, G06F 13/00
US Classification:
710 22, 710 35
Abstract:
Skip logic is provided in a storage controller that informs a direct memory access (DMA) context list manager of consecutive ones and zeroes in a skip mask table. The DMA context list manager then manages data counters and location pointers based on the number of consecutive ones and the number of consecutive zeroes. For writes and non-cached reads, the number of zeroes is used to adjust a logical sector address without actually moving data. For cached reads, the number of zeroes is used to adjust the logical sector address and a host address pointer. The DMA context list manager also determines an instruction length based on a number of consecutive ones and issues one or more instructions for each group of consecutive ones and subtracts the instruction lengths from the overall transfer length until the transfer is complete.
Lisa Miller
Location:
Fort Collins, Colorado Area
Industry:
Semiconductors