Inventors:
Dae Suk Jung - Santa Clara CA
Kyung Lee - Santa Clara CA
Assignee:
Sun Microsystems, Inc. - Santa Clara CA
International Classification:
G06F 1100
Abstract:
One embodiment of the present invention provides a system for calibrating a model of a digital circuit to account for noise effects between signal lines. The system operates by first fabricating a digital circuit for calibration purposes. Next, an input signal is applied to an aggressor net within the digital circuit. The system then measures how noise from the input signal affects the amplitude of a signal on a victim net within the digital circuit. Finally, the system adjusts parameters of the circuit model using the measured results.