KEVIN G SHEA, MD
Medical Practice at Robbins Rd, Boise, ID

7682924, Mar 23, 2010

Aug 13, 2007

11/838070

Vishwanath Bhat - Boise ID, US
Kevin R. Shea - Boise ID, US
Farrell Good - Meridian ID, US

Micron Technology, Inc. - Boise ID

H01L 21/20

438393, 438396, 438397, 438253, 438254, 438387, 257296, 257303, 257306

A method of forming a plurality of capacitors includes an insulative material received over a capacitor array area and a circuitry area. The array area comprises a plurality of capacitor electrode openings within the insulative material received over individual capacitor storage node locations. The intervening area comprises a trench. Conductive material is formed within the openings and against a sidewall portion of the trench to less than completely fill the trench. Covering material is formed over an elevationally outer lateral interface of the conductive material within the trench and the insulative material of the circuitry area. The insulative material within the array area is etched with a liquid etching solution effective to expose outer sidewall portions of the conductive material within the array area and to expose the conductive material within the trench. The conductive material within the array area is incorporated into a plurality of capacitors.

8470716, Jun 25, 2013

Nov 3, 2011

13/288715

Kevin R. Shea - Boise ID, US
Thomas M. Graettinger - Boise ID, US

Micron Technology, Inc. - Boise ID

H01L 21/302, H01L 21/311, H01L 21/318

438744, 216 72, 257E21293

The invention includes methods for selectively etching insulative material supports relative to conductive material. The invention can include methods for selectively etching silicon nitride relative to metal nitride. The metal nitride can be in the form of containers over a semiconductor substrate, with such containers having upwardly-extending openings with lateral widths of less than or equal to about 4000 angstroms; and the silicon nitride can be in the form of a layer extending between the containers. The selective etching can comprise exposure of at least some of the silicon nitride and the containers to Clto remove the exposed silicon nitride, while not removing at least the majority of the metal nitride from the containers. In subsequent processing, the containers can be incorporated into capacitors.

8124545, Feb 28, 2012

May 11, 2010

12/778043

Niraj B. Rana - Boise ID, US
Kevin R. Shea - Boise ID, US
Janos Fucsko - Boise ID, US

Micron Technology, Inc. - Boise ID

H01L 21/31

438781, 438243, 438244, 438387, 438702, 438725, 438756, 438790, 438963

The invention includes methods in which one or more components of a carboxylic acid having an aqueous acidic dissociation constant of at least 1×10are utilized during the etch of oxide (such as silicon dioxide or doped silicon dioxide). Two or more carboxylic acids can be utilized. Exemplary carboxylic acids include trichloroacetic acid, maleic acid, and citric acid.

8623725, Jan 7, 2014

Jul 23, 2012

13/555492

Mark Kiehlbauch - Boise ID, US
Kevin R. Shea - Boise ID, US

Micron Technology, Inc. - Boise ID

H01L 21/8242

438240, 438242, 438244

A method of forming a capacitor includes providing material having an opening therein over a node location on a substrate. A shield is provided within and across the opening, with a void being received within the opening above the shield and a void being received within the opening below the shield. The shield is etched through within the opening. After the etching, a first capacitor electrode is formed within the opening in electrical connection with the node location. A capacitor dielectric and a second capacitor electrode are formed operatively adjacent the first capacitor electrode.

2007017, Jul 26, 2007

Mar 22, 2007

11/726522

Kevin Torek - Meridian ID, US
Kevin Shea - Boise ID, US

H01L 21/8244

438238000

In one embodiment, a method includes providing a semiconductor substrate that includes a memory container having a double-sided capacitor. The method also includes vapor phase etching a layer adjacent to the side wall of the memory container with a vapor having a surface tension lowering agent.

7465627, Dec 16, 2008

Jul 21, 2006

11/490706

Garo J. Derderian - Boise ID, US
Kevin R. Shea - Boise ID, US

Micron Technology, Inc. - Boise ID

H01L 21/8242

438240, 438253, 438381, 257E21008

This invention includes methods of forming capacitors. In one implementation, a first capacitor electrode material is formed over a substrate. The first capacitor electrode material is exposed to a nitrogen comprising atmosphere effective to form a dielectric silicon and nitrogen comprising material on the first capacitor electrode material. The dielectric silicon and nitrogen comprising material is exposed to an aqueous fluid comprising a base and an oxidizer. The aqueous fluid has a pH greater than 7. After the exposing to the aqueous fluid, an aluminum oxide comprising capacitor dielectric material is deposited over the first capacitor electrode material. A second capacitor electrode material is formed over the aluminum oxide comprising capacitor dielectric material. Other aspects and implementations are contemplated.

7244682, Jul 17, 2007

May 6, 2004

10/841706

Kevin R. Shea - Boise ID, US
Niraj B. Rana - Boise ID, US

Micron Technology, Inc. - Boise ID

H01L 21/302

438745, 438720, 438239

Various methods for selectively etching metal-containing materials (such as, for example, metal nitrides, which can include, for example, titanium nitride) relative to one or more of silicon, silicon dioxide, silicon nitride, and doped silicon oxides in high aspect ratio structures with high etch rates. The etching can utilize hydrogen peroxide in combination with ozone, ammonium hydroxide, tetra-methyl ammonium hydroxide, hydrochloric acid and/or a persulfate. The invention can also utilize ozone in combination with hydrogen peroxide, and/or in combination with one or more of ammonium hydroxide, tetra-methyl ammonium hydroxide and a persulfate. The invention can also utilize ozone, hydrogen peroxide and HCl, with or without persulfate. The invention can also utilize hydrogen peroxide and a phosphate, either alone, or in combination with a persulfate.

8119537, Feb 21, 2012

Jun 17, 2005

11/155809

Kevin R. Shea - Boise ID, US
Kevin J. Torek - Meridian ID, US

Micron Technology, Inc. - Boise ID

H01L 21/302

438756, 438723, 438745, 216100

A method is provided for selectively etching native oxides or other contaminants to metal nitrides and metal oxides during manufacture of a semiconductor device. The method utilizes a substantially non-aqueous etchant which includes a source of fluorine ions. In a preferred embodiment, the etchant comprises HSOand HF. The etchant selectively etches native and doped oxides or other contaminants without excessively etching metal nitrides or metal oxides on the substrate or on adjacent exposed surfaces.

2007011, May 24, 2007

Jan 17, 2007

11/655386

Hongmei Wang - Boise ID, US
Fred Fishburn - Boise ID, US
Janos Fucsko - Boise ID, US
T. Allen - Kuna ID, US
Richard Lane - Boise ID, US
Robert Hanson - Boise ID, US
Kevin Shea - Boise ID, US

H01L 21/76

438424000

The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.