Kevin David Hall
Electrician in Colorado Springs, CO
License number
Colorado 108857
Issued Date
Jun 11, 2004
Renew Date
Oct 1, 2011
Expiration Date
Sep 30, 2014
Type
Journeyman Electrician
Address
Address
7075 Copper Grv, Colorado Springs, CO 80908
Personal information
See more information about Kevin David Hall at radaris.comName
Address
Phone
45853 Stagecoach Rd, Parker, CO 80138
445 Strathmore Ln APT 111, Lafayette, CO 80026
5599 S Windermere St APT 303, Littleton, CO 80120
Professional information
Single Point Probe Structure And Method
US Patent:
6768328, Jul 27, 2004
Filed:
Oct 9, 2002
Appl. No.:
10/267435
Inventors:
Bob J. Self - Colorado Springs CO
Kevin M Hall - Colorado Springs CO
Kevin M Hall - Colorado Springs CO
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
G01R 3102
US Classification:
324754, 324 725, 324761
Abstract:
One or more termination circuits or networks having compensation properties that are operative to reduce reflections occurring between a probe utilized by a test and measurement analyzer to test a device under test (DUT), such as an integrated circuit device, and the device under test itself are employed. The termination circuits are preferably small and less obtrusive than larger connectors and their compensation networking compensates for the connection of the probe to the DUT as well as connection of the cable from the probe to the analyzer performing the test and measurement function. The functionality of the termination circuits may be located at the DUT in a termination network connector or within the structure of the probe itself.
Cam Bumplett Apparatus And System
US Patent:
6846194, Jan 25, 2005
Filed:
Nov 22, 2002
Appl. No.:
10/302546
Inventors:
Bobby Joe Self - Colorado Springs CO, US
Kevin Michael Hall - Colorado Springs CO, US
Kevin Michael Hall - Colorado Springs CO, US
Assignee:
Agilent Technologies, Inc. - Palo Alto CA
International Classification:
H01R 1362, H01R 1122
US Classification:
439329, 439267
Abstract:
A system includes an interconnect that is seated and retained in a connector using a number of bumpletts arranged in the system to exert a cam force that encourages retention of the interconnect in the connector. The connector is coupled to a target board. The connector comprises a spacer nest and a pair of boards, such as printed circuit boards, that may contain electrical circuitry. The cam bumpletts may reside at the interconnect, or on either or both of the pair of boards of the connector.
Configurable Multifunction Flip-Flop
US Patent:
5684744, Nov 4, 1997
Filed:
Dec 11, 1995
Appl. No.:
8/570034
Inventors:
Rodney H. Orgill - Colorado Springs CO
Charles L. Cruse - Woodland Park CO
Kevin M. Hall - Colorado Springs CO
Charles L. Cruse - Woodland Park CO
Kevin M. Hall - Colorado Springs CO
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
H03K 19177
US Classification:
36518908
Abstract:
The present invention involves a configurable flip flop having a first data input node, a second data input node, and an output node. The configurable flip-flop includes an inverter coupled to the first data input node. Each of a plurality of configuration lines address a multiplexor and the flip-flop output node for selecting one of the first data input node, the second data input node, or an inverted first data input and coupling the selected one to a multiplexor output A latch receives the multiplexor output and generates a gated output and an edge triggered output. A configuration bit controlled selector couples either the gated output or the edge triggered output to the configurable flip-flop output node.
Configurable Multifunction Flip-Flop
US Patent:
5818273, Oct 6, 1998
Filed:
Jun 2, 1997
Appl. No.:
8/867163
Inventors:
Rodney H. Orgill - Colorado Springs CO
Charles L. Cruse - Woodland Park CO
Kevin M. Hall - Colorado Springs CO
Charles L. Cruse - Woodland Park CO
Kevin M. Hall - Colorado Springs CO
Assignee:
Hewlett-Packard Company - Palo Alto CA
International Classification:
H03K 19177
US Classification:
327199
Abstract:
The present invention involves a configurable flip flop having a first data input node, a second data input node, and an output node. The configurable flip-flop includes an inverter coupled to the first data input node. Each of a plurality of configuration lines address a multiplexor and the flip-flop output node for selecting one of the first data input node, the second data input node, or an inverted first data input and coupling the selected one to a multiplexor output. A latch receives the multiplexor output and generates a gated output and an edge triggered output. A configuration bit controlled selector couples either the gated output or the edge triggered output to the configurable flip-flop output node.
Software Debugging Analyzer
US Patent:
4720778, Jan 19, 1988
Filed:
Feb 5, 1985
Appl. No.:
6/699781
Inventors:
Kevin M. Hall - Colorado Springs CO
Daniel A. Schmelzer - Colorado Springs CO
Daniel A. Schmelzer - Colorado Springs CO
Assignee:
Hewlett Packard Company - Palo Alto CA
International Classification:
G06F 1130, G06F 1134
US Classification:
364200
Abstract:
A software debugging analyzer nonintrusively acquires data concerning the execution of software on a real-time basis. Low-level event recognition is accomplished with programmable comparators, whose outputs are fed to high-level recognition comparators to define complex events. Dynamic recognition is provided by recognition cmparators programmable on a real time basis as variables are actuated. Acquired data is stored in memory in either a sequential or random access mode. A microprocessor translates high level commands into event constructs and processes the acquired data into a format suitable for display to a user.