KENNETH FRANK JOHNSON
Pilots at Thornydale Dr, Colorado Springs, CO

License number

Colorado A2501248

Issued Date

Aug 2016

Expiration Date

Feb 2017

Professional information

Program Manager &Amp; Instructor

Position:

Instructor at American College of Technology, PM / IT Specialist at US Government

Location:

Colorado Springs, Colorado

Industry:

Computer Networking

Work:

American College of Technology - Online since Jul 2013 - Instructor US Government - Schriever AFB, CO since Nov 2012 - PM / IT Specialist Camber Corporation - Colorado Springs, Colorado Area Sep 2012 - Nov 2012 - Modeling & Simulation lead technician Special Operations Solutions - Afghanistan Mar 2012 - Oct 2012 - Network Engineer 3 CACI International Inc - Kuwait Oct 2011 - Feb 2012 - Network Administrator 3 ITT - Schriever AFB, CO Oct 2010 - Oct 2011 - Communications Engineer 4 SAIC - Colorado Springs, Colorado Area Jun 2010 - Oct 2010 - Systems Administrator United States Air Force - Qatar Apr 2009 - Apr 2010 - Combat Communications System Controller USAF - Eielson AFB, AK Jul 2008 - Apr 2009 - Firewall/Proxy Administrator USAF - Eielson AFB, AK Jun 2006 - Jul 2008 - Helpdesk Technician/Network Administrator USAF - Barksdale AFB, LA May 2004 - Jun 2006 - Helpdesk Technician

Education:

Walden University 2012 - 2014
Doctoral of Business Administration, Management Information Systems, General Trident University International 2011 - 2011
Masters, Business - Human Resources Touro University International (TUI) 2008 - 2009
Masters Degree, Information Technology; Security/Assurance and Digital Forensics Touro University International 2007 - 2008
Bachelors' of Science, Business Administration

Skills:

VMware, Network Security, Troubleshooting, Active Directory, Servers, TCP/IP, Switches, Security+, Security Clearance, Information Assurance, Top Secret, DoD, Networking, Air Force, Group Policy, Software Installation, Technical Support, Windows 7, Windows Server, VoIP, System Administration, SCCM, Program Management, Security, Windows, Leadership, Help Desk Support, Operating Systems, Microsoft Exchange, Computer Security, Software Documentation

Integrated Ball Grid Array-Pin Grid Array-Flex Laminate Test Assembly

US Patent:

6638080, Oct 28, 2003

Filed:

Jan 18, 2001

Appl. No.:

09/764551

Inventors:

Kenneth W Johnson - Colorado Springs CO
Brent A. Holcombe - Bellingham WA

Assignee:

Agilent Technologies, Inc. - Palo Alto CA

International Classification:

G01R 3102

US Classification:

439 77

Abstract:

An integrated probe assembly provides the capability to test integrated circuit (IC) packages mounted onto ball grid arrays. The present invention comprises an unsealed BGA socket ( ), nail head pins ( ) which can be inserted flush into a pin carrier to produce a PGA header ( ), a Flex circuit assembly comprising a piece of flexible circuit ( ) with various passive resistors and connectors attached and solder preforms ( ) used to solder the flex assembly to the pin grid array. Matched impedance connectors ( ) are attached at an end of the flexible circuit.

Integrated Circuit Testing Assembly And Method

US Patent:

5680057, Oct 21, 1997

Filed:

Jan 26, 1996

Appl. No.:

8/592468

Inventors:

Kenneth W. Johnson - Colorado Springs CO

Assignee:

Hewlett-Packard Company - Palo Alto CA

International Classification:

G01R 3102, H05K 706

US Classification:

324757

Abstract:

An assembly and method for testing leads of an integrated circuit package. The assembly includes a testing substrate with a plurality of conductive portions for use in connection with a test probe. The assembly further includes at least one compressible conductive bridge member for providing electrical contact between the leads of the integrated circuit package and the conductive portions of the testing substrate. The conductive bridge member has multiple electrically conductive wires embedded therein or secured thereto, each of the wires being parallel to one another and spaced apart from one another. The assembly uses a locator device for retaining the conductive bridge members therein and maintaining the conductive bridge members in electrical contact with the leads of the integrated circuit package and the conductive portions of the testing substrate.

Probe Accessories, And Methods For Probing Test Points Using Same

US Patent:

7492173, Feb 17, 2009

Filed:

Jan 12, 2006

Appl. No.:

11/331664

Inventors:

Brock J. LaMeres - Colorado Springs CO, US
Brent A. Holcombe - Colorado Springs CO, US
Kenneth Johnson - Colorado Springs CO, US

Assignee:

Agilent Technologies, Inc. - Santa Clara CA

International Classification:

G01R 31/02

US Classification:

324754

Abstract:

Probe accessories, and methods for routing signals between a target and a test instrument using the probe accessories, are disclosed. Some of the probe accessories include a flexible circuit and first and second pairs of contacts. Flexible circuit design varies, but one embodiment has first and second regions, a first conductor and a second conductor, and a separation feature. The first conductor extends into the first region while the second conductor extends into both the first and second regions and has a fixed spacing with respect to the first conductor. A separation feature extends between first and second regions and is operable to create two independently maneuverable legs, each leg comprising an end portion of the first and second regions, while maintaining a fixed spacing between the first and second conductors. The first and second pairs of contacts electrically couple the probe accessories between test points and test instruments.

Integrated Circuit Testing Assembly And Method

US Patent:

6169411, Jan 2, 2001

Filed:

Jun 2, 1997

Appl. No.:

8/867379

Inventors:

Kenneth W. Johnson - Colorado Springs CO

Assignee:

Agilent Technologies - Palo Alto CA

International Classification:

G01R 1073

US Classification:

324757

Abstract:

An assembly and method for testing leads of an integrated circuit package. The assembly includes a testing substrate with a plurality of conductive portions for use in connection with a test probe. The assembly, further includes at least one compressible conductive bridge member for providing electrical contact between the leads of the integrated circuit package and the conductive portions of the testing substrate. The conductive bridge member has multiple electrically conductive wires embedded therein or secured thereto, each of the wires being parallel to one another and spaced apart from one another. The assembly uses a locator device for retaining the conductive bridge members therein and maintaining the conductive bridge members in electrical contact with the leads of the integrated circuit package and the conductive portions of the testing substrate.

Ball Grid Array Probing Technique

US Patent:

6144213, Nov 7, 2000

Filed:

May 5, 1998

Appl. No.:

9/072952

Inventors:

Kenneth W. Johnson - Colorado Springs CO

Assignee:

Agilent Technologies - Palo Alto CA

International Classification:

G01R 102, H01R 1232, H05K 111

US Classification:

324754

Abstract:

A printed circuit assembly includes a printed circuit board with an electrically conductive via formed therein that extends from the front side of the printed circuit board to the back side of the printed circuit board. A ball grid array package mounted to the front side of the printed circuit board is electrically connected to the electrically conductive via. A probe pad formed on the back side of the printed circuit board is laterally displaced from the electrically conductive via and is electrically connected thereto. A solder mask layer deposited on the back side of the printed circuit board includes a probe pad aperture formed therein that is substantially aligned with the probe pad so that the probe pad is exposed by the probe pad aperture formed in the solder mask layer.

Closed Core Current Probe

US Patent:

2013008, Apr 4, 2013

Filed:

Sep 30, 2011

Appl. No.:

13/249836

Inventors:

Kenneth W. Johnson - Colorado Springs CO, US

Assignee:

AGILENT TECHNOLOGIES, INC. - Loveland CO

International Classification:

G01N 27/72

US Classification:

324243, 324239

Abstract:

A current probe enabling measurement of current of a signal in a circuit includes a ferrite core defining a gap, a wire wrapped around the ferrite core and a magnetic field sensor. The wire is configured to receive the signal from the circuit, where the current of the signal flowing in the wire generates a magnetic field in the ferrite core. The magnetic field sensor is positioned in the gap of the ferrite core, the magnetic field generated in the ferrite core flowing through the magnetic field sensor, which produces a voltage proportional to an intensity of the magnetic field. The current is measured based on the voltage produced by the magnetic field sensor.

Back Side Probing Method And Assembly

US Patent:

6980015, Dec 27, 2005

Filed:

Jun 17, 2003

Appl. No.:

10/463081

Inventors:

Kenneth William Johnson - Colorado Springs CO, US

Assignee:

Agilent Technologies, Inc. - Palo Alto CA

International Classification:

G01R031/02, G01R031/26

US Classification:

324755, 324754, 324765

Abstract:

An interface board for probing a device under test having a having an array of connection points on a back side of a board to which the device under test is attached. The interface board is constructed upon a stiff layer having a plurality of pass throughs from a first side to a second side in a pattern matching the array of connection points on the board to which the device under test is attached. An array of pads are formed on a first side of the interface board, each pad having a controlled surface associated with one of the pass throughs.

Ball Grid Array Package

US Patent:

7531899, May 12, 2009

Filed:

Apr 17, 2006

Appl. No.:

11/405337

Inventors:

Kenneth W Johnson - Colorado Springs CO, US

Assignee:

Agilent Technologies, Inc. - Santa Clara CA

International Classification:

H01L 23/48, H01L 23/52, H01L 29/40

US Classification:

257737, 257688, 257710, 257738, 257786, 438613, 3613063, 361600, 361728

Abstract:

An apparatus and method includes an integrated circuit disposed in a ball grid array (“BGA”) package having interconnects on at least one corner without signal assignments.