JONATHAN DAVID BRADBURY
Pilots at Mitchell Ave, Poughkeepsie, NY

License number
New York A4528240
Issued Date
Sep 2012
Expiration Date
Sep 2013
Category
Airmen
Type
Authorized Aircraft Instructor
Address
Address
45 Mitchell Ave, Poughkeepsie, NY 12603

Professional information

Jonathan Bradbury Photo 1

System And Method For Examining Remote Systems And Gathering Debug Data In Real Time

US Patent:
2007006, Mar 15, 2007
Filed:
Sep 9, 2005
Appl. No.:
11/223887
Inventors:
Jonathan Bradbury - Poughkeepsie NY, US
Scott Carlson - Tucson AZ, US
Trevor Carlson - Poughkeepsie NY, US
Donald Crabtree - Port Ewen NY, US
David Elko - Austin TX, US
Michel Henri Hack - Cortlandt Manor NY, US
William Sakal - Tivoli NY, US
Denise Sevigny - Wappingers Falls NY, US
Ronald Smith - Wappingers Falls NY, US
Li Zhang - Yorktown Heights NY, US
Assignee:
International Business Machines Corporation - Armonk NY
International Classification:
G06F 11/00
US Classification:
714039000
Abstract:
A system, method and computer program product for dynamically debugging a multi-node network comprising an infrastructure including a plurality of devices, each device adapted for communicating messages between nodes which may include information for synchronizing a timing clock provided in each node. The apparatus comprises a plurality of probe links interconnecting each node with a probe device that monitors data included in each message communicated by a node. Each probe device processes data from each message to determine existence of a trigger condition at a node and, in response to detecting a trigger condition, generates a specialized message for receipt by all nodes in the network. Each node responds to the specialized message by halting operation at the node and recording data useful for debugging purposes. In this manner, debug information is collected at each node at the time of a first error detection and collected dynamically at execution time without manual intervention.


Jonathan Bradbury Photo 2

Instruction To Compute The Distance To A Specified Memory Boundary

US Patent:
2013024, Sep 19, 2013
Filed:
Mar 15, 2012
Appl. No.:
13/421451
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Christian Jacobi - Schoenaich, DE
Eric M. Schwarz - Gardiner NY, US
Timothy J. Slegel - Staatsburg NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - ARMONK NY
International Classification:
G06F 9/34
US Classification:
712227, 712E09023, 712E09038
Abstract:
A Load Count to Block Boundary instruction is provided that provides a distance from a specified memory address to a specified memory boundary. The memory boundary is a boundary that is not to be crossed in loading data. The boundary may be specified a number of ways, including, but not limited to, a variable value in the instruction text, a fixed instruction text value encoded in the opcode, or a register based boundary; or it may be dynamically determined.


Jonathan Bradbury Photo 3

Comparing Sets Of Character Data Having Termination Characters

US Patent:
2013024, Sep 19, 2013
Filed:
Mar 15, 2012
Appl. No.:
13/421614
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Timothy J. Slegel - Staatsburg NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06K 9/18
US Classification:
382182
Abstract:
Multiple sets of character data having termination characters are compared using parallel processing and without causing unwarranted exceptions. Each set of character data to be compared is loaded within one or more vector registers. In particular, in one embodiment, for each set of character data to be compared, an instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded. Further, an instruction is used to find the index of the first delimiter character, i.e., the first zero or null character, or the index of unequal characters. Using these instructions, a location of the end of one of the sets of data or a location of an unequal character is efficiently provided.


Jonathan Bradbury Photo 4

Run-Time Instrumentation Indirect Sampling By Address

US Patent:
2013024, Sep 19, 2013
Filed:
Mar 16, 2012
Appl. No.:
13/422550
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/30
US Classification:
712220, 712E09016
Abstract:
Embodiments of the invention relate to implementing run-time instrumentation indirect sampling by address. An aspect of the invention includes reading sample-point addresses from a sample-point address array, and comparing, by a processor, the sample-point addresses to an address associated with an instruction from an instruction stream executing on the processor. A sample point is recognized upon execution of the instruction associated with the address matching one of the sample-point addresses. Run-time instrumentation information is obtained from the sample point. The run-time instrumentation information is stored in a run-time instrumentation program buffer as a reporting group.


Jonathan Bradbury Photo 5

Finding The Length Of A Set Of Character Data Having A Termination Character

US Patent:
2013024, Sep 19, 2013
Filed:
Mar 15, 2012
Appl. No.:
13/421640
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Timothy J. Slegel - Staatsburg NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 12/00
US Classification:
711109, 711E12001
Abstract:
The length of character data having a termination character is determined. The character data for which the length is to be determined is loaded, in parallel, within one or more vector registers. An instruction is used that loads data in a vector register to a specified boundary, and provides a way to determine the number of characters loaded, using, for instance, another instruction. Further, an instruction is used to find the index of the first termination character, e.g., the first zero or null character. This instruction searches the data in parallel for the termination character. By using these instructions, the length of the character data is determined using only one branch instruction.


Jonathan Bradbury Photo 6

Vector String Range Compare

US Patent:
2013024, Sep 19, 2013
Filed:
Mar 15, 2012
Appl. No.:
13/421560
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Eric M. Schwarz - Gardiner NY, US
Timothy J. Slegel - Staatsburg NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/30, G06F 9/34
US Classification:
712220, 712E0902, 712E09023, 712E09033, 712E09038
Abstract:
Processing of character data is facilitated. A Vector String Range Compare instruction is provided that compares each element of a vector with a range of values based on a set of controls to determine if there is a match. An index associated with the matched element or a mask representing the matched element is stored in a target vector register. Further, the same instruction, the Vector String Range Compare instruction, also searches a selected vector for null elements, also referred to as zero elements.


Jonathan Bradbury Photo 7

Vector Find Element Equal Instruction

US Patent:
2013024, Sep 19, 2013
Filed:
Mar 15, 2012
Appl. No.:
13/421448
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Eric M. Schwarz - Gardiner NY, US
Timothy J. Slegel - Staatsburg NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/34, G06F 9/312
US Classification:
712220, 712E0902, 712E09023, 712E09033, 712E09038
Abstract:
Processing of character data is facilitated. A Find Element Equal instruction is provided that compares data of multiple vectors for equality and provides an indication of equality, if equality exists. An index associated with the equal element is stored in a target vector register. Further, the same instruction, the Find Element Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.


Jonathan Bradbury Photo 8

Vector Find Element Not Equal Instruction

US Patent:
2013024, Sep 19, 2013
Filed:
Mar 15, 2012
Appl. No.:
13/421442
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Eric M. Schwarz - Gardiner NY, US
Timothy J. Slegel - Staatsburg NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/34, G06F 9/312
US Classification:
712220, 712E09023, 712E09033, 712E09035, 712E0902
Abstract:
Processing of character data is facilitated. A Find Element Not Equal instruction is provided that compares data of multiple vectors for inequality and provides an indication of inequality, if inequality exists. An index associated with the unequal element is stored in a target vector register. Further, the same instruction, the Find Element Not Equal instruction, also searches a selected vector for null elements, also referred to as zero elements. A result of the instruction is dependent on whether the null search is provided, or just the compare.


Jonathan Bradbury Photo 9

Managing Register Pairing

US Patent:
2014002, Jan 23, 2014
Filed:
Jul 18, 2012
Appl. No.:
13/552109
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/30
US Classification:
712204, 712E09023
Abstract:
Embodiments relate to reducing a number of read ports for register pairs. An aspect includes maintaining an active pairing indicator that is configured to have a first value or a second value. The first value indicates that the wide operand is stored in a wide register. The second value indicates that the wide operand is not stored in the wide register. The operand is read from either the wide register or a pair of registers based on the active pairing indicator. The active pairing indicator and the values of the set of wide registers are stored to a storage based on a request to store a register pairing status. A saved pairing indicator and saved values of the set of wide registers is loaded from the storage respectively into an active pairing register and wide registers.


Jonathan Bradbury Photo 10

Predicting Register Pairs

US Patent:
2014002, Jan 23, 2014
Filed:
Jul 18, 2012
Appl. No.:
13/552108
Inventors:
Jonathan D. Bradbury - Poughkeepsie NY, US
Michael K. Gschwind - Chappaqua NY, US
Assignee:
INTERNATIONAL BUSINESS MACHINES CORPORATION - Armonk NY
International Classification:
G06F 9/30
US Classification:
712204, 712E09023
Abstract:
Embodiments relate to reducing a number of read ports for register pairs. An aspect includes executing an instruction. The instruction identifies a pair of registers as containing a wide operand which spans the pair of registers. The executing of the instruction includes determining whether a pairing indicator associated with the pair of registers has a first value, a second value or a third value. Based on the pairing indicator having the first value, the wide operand is read from the wide register. Based on the pairing indicator having the second value the wide operand is read from the pair of registers. Based on the pairing indicator having the third value, the wide operand is speculatively read from a predetermined register. The predetermined register consists of the wide register or the pair of registers.